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[88.112.131.206]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-302245cf66csm15409481fa.25.2024.12.13.09.58.20 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 13 Dec 2024 09:58:22 -0800 (PST) Message-ID: <8308a825-2f33-4ec6-bfd2-9d3ed31c4a56@linaro.org> Date: Fri, 13 Dec 2024 19:58:20 +0200 Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/2] media: qcom: camss: Restrict endpoint bus-type to D-PHY Content-Language: ru-RU To: Luca Weiss , Robert Foss , Todor Tomov , Bryan O'Donoghue , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Barnabas Czeman , AngeloGioacchino Del Regno , Caleb Connolly , David Heidelberg Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20241209-camss-dphy-v1-0-5f1b6f25ed92@fairphone.com> <20241209-camss-dphy-v1-2-5f1b6f25ed92@fairphone.com> From: Vladimir Zapolskiy In-Reply-To: <20241209-camss-dphy-v1-2-5f1b6f25ed92@fairphone.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Hi Luca. On 12/9/24 14:01, Luca Weiss wrote: > Currently the Qualcomm CAMSS driver only supports D-PHY while the > hardware on most SoCs also supports C-PHY. Until this support is added, > check for D-PHY to make it somewhat explicit that C-PHY won't work. > > Signed-off-by: Luca Weiss > --- > drivers/media/platform/qcom/camss/camss.c | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c > index 9fb31f4c18adee886cd0bcf84438a8f27635e07f..b99af35074cdf6fa794a0d2f0d54ecf12ac354d9 100644 > --- a/drivers/media/platform/qcom/camss/camss.c > +++ b/drivers/media/platform/qcom/camss/camss.c > @@ -1855,6 +1855,15 @@ static int camss_of_parse_endpoint_node(struct device *dev, > if (ret) > return ret; > > + /* > + * Most SoCs support both D-PHY and C-PHY standards, but currently only > + * D-PHY is supported in the driver. > + */ > + if (vep.bus_type != V4L2_MBUS_CSI2_DPHY) { > + dev_err(dev, "Unsupported bus type %d\n", vep.bus_type); > + return -EINVAL; > + } > + > csd->interface.csiphy_id = vep.base.port; > > mipi_csi2 = &vep.bus.mipi_csi2; My cautious worries were futile, the change works as expected and the regression testing on RB5 is passed: ===== begin parsing endpoint /soc@0/camss@ac6a000/ports/port@2/endpoint fwnode video bus type not specified (0), mbus type not specified (0) lane 0 position 0 lane 1 position 1 lane 2 position 2 lane 3 position 3 clock lane position 7 no lane polarities defined, assuming not inverted assuming media bus type MIPI CSI-2 D-PHY (5) ===== end parsing endpoint /soc@0/camss@ac6a000/ports/port@2/endpoint Tested-by: Vladimir Zapolskiy Reviewed-by: Vladimir Zapolskiy -- Best wishes, Vladimir