* [PATCH - v4 2/4] V4L-vpfe-capture-converting dm355 ccdc driver to a platform driver
2010-01-11 19:22 m-karicheri2
@ 2010-01-11 19:22 ` m-karicheri2
2010-01-11 21:38 ` Kevin Hilman
0 siblings, 1 reply; 11+ messages in thread
From: m-karicheri2 @ 2010-01-11 19:22 UTC (permalink / raw)
To: linux-media, khilman, mchehab
Cc: hverkuil, davinci-linux-open-source, Muralidharan Karicheri
From: Muralidharan Karicheri <m-karicheri2@ti.com>
Rebased to latest linux-next tree
Updated based on Kevin's comments on clock configuration.
The ccdc now uses a generic name for clocks. "master" and "slave". On individual platforms
these clocks will inherit from the platform specific clock. This will allow re-use of
the driver for the same IP across different SoCs.
Following are the changes done:-
1) clocks are configured using generic clock names
2) converting the driver to a platform driver
3) cleanup - consolidate all static variables inside a structure, ccdc_cfg
Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com>
Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com>
Reviewed-by: Hans Verkuil <hverkuil@xs4all.nl>
Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
Signed-off-by: Muralidharan Karicheri <m-karicheri2@ti.com>
---
Applies to linux-next branch of v4l-dvb
drivers/media/video/davinci/dm355_ccdc.c | 409 +++++++++++++++++++-----------
1 files changed, 256 insertions(+), 153 deletions(-)
diff --git a/drivers/media/video/davinci/dm355_ccdc.c b/drivers/media/video/davinci/dm355_ccdc.c
index 3143900..fc716ed 100644
--- a/drivers/media/video/davinci/dm355_ccdc.c
+++ b/drivers/media/video/davinci/dm355_ccdc.c
@@ -37,8 +37,11 @@
#include <linux/platform_device.h>
#include <linux/uaccess.h>
#include <linux/videodev2.h>
+#include <linux/clk.h>
+
#include <media/davinci/dm355_ccdc.h>
#include <media/davinci/vpss.h>
+
#include "dm355_ccdc_regs.h"
#include "ccdc_hw_device.h"
@@ -46,67 +49,75 @@ MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("CCDC Driver for DM355");
MODULE_AUTHOR("Texas Instruments");
-static struct device *dev;
-
-/* Object for CCDC raw mode */
-static struct ccdc_params_raw ccdc_hw_params_raw = {
- .pix_fmt = CCDC_PIXFMT_RAW,
- .frm_fmt = CCDC_FRMFMT_PROGRESSIVE,
- .win = CCDC_WIN_VGA,
- .fid_pol = VPFE_PINPOL_POSITIVE,
- .vd_pol = VPFE_PINPOL_POSITIVE,
- .hd_pol = VPFE_PINPOL_POSITIVE,
- .gain = {
- .r_ye = 256,
- .gb_g = 256,
- .gr_cy = 256,
- .b_mg = 256
- },
- .config_params = {
- .datasft = 2,
- .data_sz = CCDC_DATA_10BITS,
- .mfilt1 = CCDC_NO_MEDIAN_FILTER1,
- .mfilt2 = CCDC_NO_MEDIAN_FILTER2,
- .alaw = {
- .gama_wd = 2,
+static struct ccdc_oper_config {
+ struct device *dev;
+ /* CCDC interface type */
+ enum vpfe_hw_if_type if_type;
+ /* Raw Bayer configuration */
+ struct ccdc_params_raw bayer;
+ /* YCbCr configuration */
+ struct ccdc_params_ycbcr ycbcr;
+ /* Master clock */
+ struct clk *mclk;
+ /* slave clock */
+ struct clk *sclk;
+ /* ccdc base address */
+ void __iomem *base_addr;
+} ccdc_cfg = {
+ /* Raw configurations */
+ .bayer = {
+ .pix_fmt = CCDC_PIXFMT_RAW,
+ .frm_fmt = CCDC_FRMFMT_PROGRESSIVE,
+ .win = CCDC_WIN_VGA,
+ .fid_pol = VPFE_PINPOL_POSITIVE,
+ .vd_pol = VPFE_PINPOL_POSITIVE,
+ .hd_pol = VPFE_PINPOL_POSITIVE,
+ .gain = {
+ .r_ye = 256,
+ .gb_g = 256,
+ .gr_cy = 256,
+ .b_mg = 256
},
- .blk_clamp = {
- .sample_pixel = 1,
- .dc_sub = 25
- },
- .col_pat_field0 = {
- .olop = CCDC_GREEN_BLUE,
- .olep = CCDC_BLUE,
- .elop = CCDC_RED,
- .elep = CCDC_GREEN_RED
- },
- .col_pat_field1 = {
- .olop = CCDC_GREEN_BLUE,
- .olep = CCDC_BLUE,
- .elop = CCDC_RED,
- .elep = CCDC_GREEN_RED
+ .config_params = {
+ .datasft = 2,
+ .mfilt1 = CCDC_NO_MEDIAN_FILTER1,
+ .mfilt2 = CCDC_NO_MEDIAN_FILTER2,
+ .alaw = {
+ .gama_wd = 2,
+ },
+ .blk_clamp = {
+ .sample_pixel = 1,
+ .dc_sub = 25
+ },
+ .col_pat_field0 = {
+ .olop = CCDC_GREEN_BLUE,
+ .olep = CCDC_BLUE,
+ .elop = CCDC_RED,
+ .elep = CCDC_GREEN_RED
+ },
+ .col_pat_field1 = {
+ .olop = CCDC_GREEN_BLUE,
+ .olep = CCDC_BLUE,
+ .elop = CCDC_RED,
+ .elep = CCDC_GREEN_RED
+ },
},
},
+ /* YCbCr configuration */
+ .ycbcr = {
+ .win = CCDC_WIN_PAL,
+ .pix_fmt = CCDC_PIXFMT_YCBCR_8BIT,
+ .frm_fmt = CCDC_FRMFMT_INTERLACED,
+ .fid_pol = VPFE_PINPOL_POSITIVE,
+ .vd_pol = VPFE_PINPOL_POSITIVE,
+ .hd_pol = VPFE_PINPOL_POSITIVE,
+ .bt656_enable = 1,
+ .pix_order = CCDC_PIXORDER_CBYCRY,
+ .buf_type = CCDC_BUFTYPE_FLD_INTERLEAVED
+ },
};
-/* Object for CCDC ycbcr mode */
-static struct ccdc_params_ycbcr ccdc_hw_params_ycbcr = {
- .win = CCDC_WIN_PAL,
- .pix_fmt = CCDC_PIXFMT_YCBCR_8BIT,
- .frm_fmt = CCDC_FRMFMT_INTERLACED,
- .fid_pol = VPFE_PINPOL_POSITIVE,
- .vd_pol = VPFE_PINPOL_POSITIVE,
- .hd_pol = VPFE_PINPOL_POSITIVE,
- .bt656_enable = 1,
- .pix_order = CCDC_PIXORDER_CBYCRY,
- .buf_type = CCDC_BUFTYPE_FLD_INTERLEAVED
-};
-
-static enum vpfe_hw_if_type ccdc_if_type;
-static void *__iomem ccdc_base_addr;
-static int ccdc_addr_size;
-
/* Raw Bayer formats */
static u32 ccdc_raw_bayer_pix_formats[] =
{V4L2_PIX_FMT_SBGGR8, V4L2_PIX_FMT_SBGGR16};
@@ -118,18 +129,12 @@ static u32 ccdc_raw_yuv_pix_formats[] =
/* register access routines */
static inline u32 regr(u32 offset)
{
- return __raw_readl(ccdc_base_addr + offset);
+ return __raw_readl(ccdc_cfg.base_addr + offset);
}
static inline void regw(u32 val, u32 offset)
{
- __raw_writel(val, ccdc_base_addr + offset);
-}
-
-static void ccdc_set_ccdc_base(void *addr, int size)
-{
- ccdc_base_addr = addr;
- ccdc_addr_size = size;
+ __raw_writel(val, ccdc_cfg.base_addr + offset);
}
static void ccdc_enable(int en)
@@ -153,12 +158,12 @@ static void ccdc_enable_output_to_sdram(int en)
static void ccdc_config_gain_offset(void)
{
/* configure gain */
- regw(ccdc_hw_params_raw.gain.r_ye, RYEGAIN);
- regw(ccdc_hw_params_raw.gain.gr_cy, GRCYGAIN);
- regw(ccdc_hw_params_raw.gain.gb_g, GBGGAIN);
- regw(ccdc_hw_params_raw.gain.b_mg, BMGGAIN);
+ regw(ccdc_cfg.bayer.gain.r_ye, RYEGAIN);
+ regw(ccdc_cfg.bayer.gain.gr_cy, GRCYGAIN);
+ regw(ccdc_cfg.bayer.gain.gb_g, GBGGAIN);
+ regw(ccdc_cfg.bayer.gain.b_mg, BMGGAIN);
/* configure offset */
- regw(ccdc_hw_params_raw.ccdc_offset, OFFSET);
+ regw(ccdc_cfg.bayer.ccdc_offset, OFFSET);
}
/*
@@ -169,7 +174,7 @@ static int ccdc_restore_defaults(void)
{
int i;
- dev_dbg(dev, "\nstarting ccdc_restore_defaults...");
+ dev_dbg(ccdc_cfg.dev, "\nstarting ccdc_restore_defaults...");
/* set all registers to zero */
for (i = 0; i <= CCDC_REG_LAST; i += 4)
regw(0, i);
@@ -180,30 +185,29 @@ static int ccdc_restore_defaults(void)
regw(CULH_DEFAULT, CULH);
regw(CULV_DEFAULT, CULV);
/* Set default Gain and Offset */
- ccdc_hw_params_raw.gain.r_ye = GAIN_DEFAULT;
- ccdc_hw_params_raw.gain.gb_g = GAIN_DEFAULT;
- ccdc_hw_params_raw.gain.gr_cy = GAIN_DEFAULT;
- ccdc_hw_params_raw.gain.b_mg = GAIN_DEFAULT;
+ ccdc_cfg.bayer.gain.r_ye = GAIN_DEFAULT;
+ ccdc_cfg.bayer.gain.gb_g = GAIN_DEFAULT;
+ ccdc_cfg.bayer.gain.gr_cy = GAIN_DEFAULT;
+ ccdc_cfg.bayer.gain.b_mg = GAIN_DEFAULT;
ccdc_config_gain_offset();
regw(OUTCLIP_DEFAULT, OUTCLIP);
regw(LSCCFG2_DEFAULT, LSCCFG2);
/* select ccdc input */
if (vpss_select_ccdc_source(VPSS_CCDCIN)) {
- dev_dbg(dev, "\ncouldn't select ccdc input source");
+ dev_dbg(ccdc_cfg.dev, "\ncouldn't select ccdc input source");
return -EFAULT;
}
/* select ccdc clock */
if (vpss_enable_clock(VPSS_CCDC_CLOCK, 1) < 0) {
- dev_dbg(dev, "\ncouldn't enable ccdc clock");
+ dev_dbg(ccdc_cfg.dev, "\ncouldn't enable ccdc clock");
return -EFAULT;
}
- dev_dbg(dev, "\nEnd of ccdc_restore_defaults...");
+ dev_dbg(ccdc_cfg.dev, "\nEnd of ccdc_restore_defaults...");
return 0;
}
static int ccdc_open(struct device *device)
{
- dev = device;
return ccdc_restore_defaults();
}
@@ -226,7 +230,7 @@ static void ccdc_setwin(struct v4l2_rect *image_win,
int vert_start, vert_nr_lines;
int mid_img = 0;
- dev_dbg(dev, "\nStarting ccdc_setwin...");
+ dev_dbg(ccdc_cfg.dev, "\nStarting ccdc_setwin...");
/*
* ppc - per pixel count. indicates how many pixels per cell
@@ -260,45 +264,46 @@ static void ccdc_setwin(struct v4l2_rect *image_win,
regw(vert_start & CCDC_START_VER_ONE_MASK, SLV0);
regw(vert_start & CCDC_START_VER_TWO_MASK, SLV1);
regw(vert_nr_lines & CCDC_NUM_LINES_VER, NLV);
- dev_dbg(dev, "\nEnd of ccdc_setwin...");
+ dev_dbg(ccdc_cfg.dev, "\nEnd of ccdc_setwin...");
}
static int validate_ccdc_param(struct ccdc_config_params_raw *ccdcparam)
{
if (ccdcparam->datasft < CCDC_DATA_NO_SHIFT ||
ccdcparam->datasft > CCDC_DATA_SHIFT_6BIT) {
- dev_dbg(dev, "Invalid value of data shift\n");
+ dev_dbg(ccdc_cfg.dev, "Invalid value of data shift\n");
return -EINVAL;
}
if (ccdcparam->mfilt1 < CCDC_NO_MEDIAN_FILTER1 ||
ccdcparam->mfilt1 > CCDC_MEDIAN_FILTER1) {
- dev_dbg(dev, "Invalid value of median filter1\n");
+ dev_dbg(ccdc_cfg.dev, "Invalid value of median filter1\n");
return -EINVAL;
}
if (ccdcparam->mfilt2 < CCDC_NO_MEDIAN_FILTER2 ||
ccdcparam->mfilt2 > CCDC_MEDIAN_FILTER2) {
- dev_dbg(dev, "Invalid value of median filter2\n");
+ dev_dbg(ccdc_cfg.dev, "Invalid value of median filter2\n");
return -EINVAL;
}
if ((ccdcparam->med_filt_thres < 0) ||
(ccdcparam->med_filt_thres > CCDC_MED_FILT_THRESH)) {
- dev_dbg(dev, "Invalid value of median filter threshold\n");
+ dev_dbg(ccdc_cfg.dev,
+ "Invalid value of median filter thresold\n");
return -EINVAL;
}
if (ccdcparam->data_sz < CCDC_DATA_16BITS ||
ccdcparam->data_sz > CCDC_DATA_8BITS) {
- dev_dbg(dev, "Invalid value of data size\n");
+ dev_dbg(ccdc_cfg.dev, "Invalid value of data size\n");
return -EINVAL;
}
if (ccdcparam->alaw.enable) {
if (ccdcparam->alaw.gama_wd < CCDC_GAMMA_BITS_13_4 ||
ccdcparam->alaw.gama_wd > CCDC_GAMMA_BITS_09_0) {
- dev_dbg(dev, "Invalid value of ALAW\n");
+ dev_dbg(ccdc_cfg.dev, "Invalid value of ALAW\n");
return -EINVAL;
}
}
@@ -306,12 +311,14 @@ static int validate_ccdc_param(struct ccdc_config_params_raw *ccdcparam)
if (ccdcparam->blk_clamp.b_clamp_enable) {
if (ccdcparam->blk_clamp.sample_pixel < CCDC_SAMPLE_1PIXELS ||
ccdcparam->blk_clamp.sample_pixel > CCDC_SAMPLE_16PIXELS) {
- dev_dbg(dev, "Invalid value of sample pixel\n");
+ dev_dbg(ccdc_cfg.dev,
+ "Invalid value of sample pixel\n");
return -EINVAL;
}
if (ccdcparam->blk_clamp.sample_ln < CCDC_SAMPLE_1LINES ||
ccdcparam->blk_clamp.sample_ln > CCDC_SAMPLE_16LINES) {
- dev_dbg(dev, "Invalid value of sample lines\n");
+ dev_dbg(ccdc_cfg.dev,
+ "Invalid value of sample lines\n");
return -EINVAL;
}
}
@@ -325,18 +332,18 @@ static int ccdc_set_params(void __user *params)
int x;
/* only raw module parameters can be set through the IOCTL */
- if (ccdc_if_type != VPFE_RAW_BAYER)
+ if (ccdc_cfg.if_type != VPFE_RAW_BAYER)
return -EINVAL;
x = copy_from_user(&ccdc_raw_params, params, sizeof(ccdc_raw_params));
if (x) {
- dev_dbg(dev, "ccdc_set_params: error in copying ccdc"
+ dev_dbg(ccdc_cfg.dev, "ccdc_set_params: error in copying ccdc"
"params, %d\n", x);
return -EFAULT;
}
if (!validate_ccdc_param(&ccdc_raw_params)) {
- memcpy(&ccdc_hw_params_raw.config_params,
+ memcpy(&ccdc_cfg.bayer.config_params,
&ccdc_raw_params,
sizeof(ccdc_raw_params));
return 0;
@@ -347,11 +354,11 @@ static int ccdc_set_params(void __user *params)
/* This function will configure CCDC for YCbCr video capture */
static void ccdc_config_ycbcr(void)
{
- struct ccdc_params_ycbcr *params = &ccdc_hw_params_ycbcr;
+ struct ccdc_params_ycbcr *params = &ccdc_cfg.ycbcr;
u32 temp;
/* first set the CCDC power on defaults values in all registers */
- dev_dbg(dev, "\nStarting ccdc_config_ycbcr...");
+ dev_dbg(ccdc_cfg.dev, "\nStarting ccdc_config_ycbcr...");
ccdc_restore_defaults();
/* configure pixel format & video frame format */
@@ -403,7 +410,7 @@ static void ccdc_config_ycbcr(void)
regw(CCDC_SDOFST_FIELD_INTERLEAVED, SDOFST);
}
- dev_dbg(dev, "\nEnd of ccdc_config_ycbcr...\n");
+ dev_dbg(ccdc_cfg.dev, "\nEnd of ccdc_config_ycbcr...\n");
}
/*
@@ -483,7 +490,7 @@ int ccdc_write_dfc_entry(int index, struct ccdc_vertical_dft *dfc)
*/
if (count) {
- dev_err(dev, "defect table write timeout !!!\n");
+ dev_err(ccdc_cfg.dev, "defect table write timeout !!!\n");
return -1;
}
return 0;
@@ -605,12 +612,12 @@ static void ccdc_config_color_patterns(struct ccdc_col_pat *pat0,
/* This function will configure CCDC for Raw mode image capture */
static int ccdc_config_raw(void)
{
- struct ccdc_params_raw *params = &ccdc_hw_params_raw;
+ struct ccdc_params_raw *params = &ccdc_cfg.bayer;
struct ccdc_config_params_raw *config_params =
- &ccdc_hw_params_raw.config_params;
+ &ccdc_cfg.bayer.config_params;
unsigned int val;
- dev_dbg(dev, "\nStarting ccdc_config_raw...");
+ dev_dbg(ccdc_cfg.dev, "\nStarting ccdc_config_raw...");
/* restore power on defaults to register */
ccdc_restore_defaults();
@@ -659,7 +666,7 @@ static int ccdc_config_raw(void)
val |= (config_params->datasft & CCDC_DATASFT_MASK) <<
CCDC_DATASFT_SHIFT;
regw(val , MODESET);
- dev_dbg(dev, "\nWriting 0x%x to MODESET...\n", val);
+ dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to MODESET...\n", val);
/* Configure the Median Filter threshold */
regw((config_params->med_filt_thres) & CCDC_MED_FILT_THRESH, MEDFILT);
@@ -681,7 +688,7 @@ static int ccdc_config_raw(void)
(config_params->mfilt2 << CCDC_MFILT2_SHIFT));
regw(val, GAMMAWD);
- dev_dbg(dev, "\nWriting 0x%x to GAMMAWD...\n", val);
+ dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to GAMMAWD...\n", val);
/* configure video window */
ccdc_setwin(¶ms->win, params->frm_fmt, 1);
@@ -706,7 +713,7 @@ static int ccdc_config_raw(void)
/* Configure the Gain & offset control */
ccdc_config_gain_offset();
- dev_dbg(dev, "\nWriting %x to COLPTN...\n", val);
+ dev_dbg(ccdc_cfg.dev, "\nWriting %x to COLPTN...\n", val);
/* Configure DATAOFST register */
val = (config_params->data_offset.horz_offset & CCDC_DATAOFST_MASK) <<
@@ -726,7 +733,7 @@ static int ccdc_config_raw(void)
CCDC_HSIZE_VAL_MASK;
/* adjust to multiple of 32 */
- dev_dbg(dev, "\nWriting 0x%x to HSIZE...\n",
+ dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to HSIZE...\n",
(((params->win.width) + 31) >> 5) &
CCDC_HSIZE_VAL_MASK);
} else {
@@ -734,7 +741,7 @@ static int ccdc_config_raw(void)
val |= (((params->win.width * 2) + 31) >> 5) &
CCDC_HSIZE_VAL_MASK;
- dev_dbg(dev, "\nWriting 0x%x to HSIZE...\n",
+ dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to HSIZE...\n",
(((params->win.width * 2) + 31) >> 5) &
CCDC_HSIZE_VAL_MASK);
}
@@ -745,34 +752,34 @@ static int ccdc_config_raw(void)
if (params->image_invert_enable) {
/* For interlace inverse mode */
regw(CCDC_SDOFST_INTERLACE_INVERSE, SDOFST);
- dev_dbg(dev, "\nWriting %x to SDOFST...\n",
+ dev_dbg(ccdc_cfg.dev, "\nWriting %x to SDOFST...\n",
CCDC_SDOFST_INTERLACE_INVERSE);
} else {
/* For interlace non inverse mode */
regw(CCDC_SDOFST_INTERLACE_NORMAL, SDOFST);
- dev_dbg(dev, "\nWriting %x to SDOFST...\n",
+ dev_dbg(ccdc_cfg.dev, "\nWriting %x to SDOFST...\n",
CCDC_SDOFST_INTERLACE_NORMAL);
}
} else if (params->frm_fmt == CCDC_FRMFMT_PROGRESSIVE) {
if (params->image_invert_enable) {
/* For progessive inverse mode */
regw(CCDC_SDOFST_PROGRESSIVE_INVERSE, SDOFST);
- dev_dbg(dev, "\nWriting %x to SDOFST...\n",
+ dev_dbg(ccdc_cfg.dev, "\nWriting %x to SDOFST...\n",
CCDC_SDOFST_PROGRESSIVE_INVERSE);
} else {
/* For progessive non inverse mode */
regw(CCDC_SDOFST_PROGRESSIVE_NORMAL, SDOFST);
- dev_dbg(dev, "\nWriting %x to SDOFST...\n",
+ dev_dbg(ccdc_cfg.dev, "\nWriting %x to SDOFST...\n",
CCDC_SDOFST_PROGRESSIVE_NORMAL);
}
}
- dev_dbg(dev, "\nend of ccdc_config_raw...");
+ dev_dbg(ccdc_cfg.dev, "\nend of ccdc_config_raw...");
return 0;
}
static int ccdc_configure(void)
{
- if (ccdc_if_type == VPFE_RAW_BAYER)
+ if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
return ccdc_config_raw();
else
ccdc_config_ycbcr();
@@ -781,23 +788,23 @@ static int ccdc_configure(void)
static int ccdc_set_buftype(enum ccdc_buftype buf_type)
{
- if (ccdc_if_type == VPFE_RAW_BAYER)
- ccdc_hw_params_raw.buf_type = buf_type;
+ if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
+ ccdc_cfg.bayer.buf_type = buf_type;
else
- ccdc_hw_params_ycbcr.buf_type = buf_type;
+ ccdc_cfg.ycbcr.buf_type = buf_type;
return 0;
}
static enum ccdc_buftype ccdc_get_buftype(void)
{
- if (ccdc_if_type == VPFE_RAW_BAYER)
- return ccdc_hw_params_raw.buf_type;
- return ccdc_hw_params_ycbcr.buf_type;
+ if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
+ return ccdc_cfg.bayer.buf_type;
+ return ccdc_cfg.ycbcr.buf_type;
}
static int ccdc_enum_pix(u32 *pix, int i)
{
int ret = -EINVAL;
- if (ccdc_if_type == VPFE_RAW_BAYER) {
+ if (ccdc_cfg.if_type == VPFE_RAW_BAYER) {
if (i < ARRAY_SIZE(ccdc_raw_bayer_pix_formats)) {
*pix = ccdc_raw_bayer_pix_formats[i];
ret = 0;
@@ -813,20 +820,19 @@ static int ccdc_enum_pix(u32 *pix, int i)
static int ccdc_set_pixel_format(u32 pixfmt)
{
- struct ccdc_a_law *alaw =
- &ccdc_hw_params_raw.config_params.alaw;
+ struct ccdc_a_law *alaw = &ccdc_cfg.bayer.config_params.alaw;
- if (ccdc_if_type == VPFE_RAW_BAYER) {
- ccdc_hw_params_raw.pix_fmt = CCDC_PIXFMT_RAW;
+ if (ccdc_cfg.if_type == VPFE_RAW_BAYER) {
+ ccdc_cfg.bayer.pix_fmt = CCDC_PIXFMT_RAW;
if (pixfmt == V4L2_PIX_FMT_SBGGR8)
alaw->enable = 1;
else if (pixfmt != V4L2_PIX_FMT_SBGGR16)
return -EINVAL;
} else {
if (pixfmt == V4L2_PIX_FMT_YUYV)
- ccdc_hw_params_ycbcr.pix_order = CCDC_PIXORDER_YCBYCR;
+ ccdc_cfg.ycbcr.pix_order = CCDC_PIXORDER_YCBYCR;
else if (pixfmt == V4L2_PIX_FMT_UYVY)
- ccdc_hw_params_ycbcr.pix_order = CCDC_PIXORDER_CBYCRY;
+ ccdc_cfg.ycbcr.pix_order = CCDC_PIXORDER_CBYCRY;
else
return -EINVAL;
}
@@ -834,17 +840,16 @@ static int ccdc_set_pixel_format(u32 pixfmt)
}
static u32 ccdc_get_pixel_format(void)
{
- struct ccdc_a_law *alaw =
- &ccdc_hw_params_raw.config_params.alaw;
+ struct ccdc_a_law *alaw = &ccdc_cfg.bayer.config_params.alaw;
u32 pixfmt;
- if (ccdc_if_type == VPFE_RAW_BAYER)
+ if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
if (alaw->enable)
pixfmt = V4L2_PIX_FMT_SBGGR8;
else
pixfmt = V4L2_PIX_FMT_SBGGR16;
else {
- if (ccdc_hw_params_ycbcr.pix_order == CCDC_PIXORDER_YCBYCR)
+ if (ccdc_cfg.ycbcr.pix_order == CCDC_PIXORDER_YCBYCR)
pixfmt = V4L2_PIX_FMT_YUYV;
else
pixfmt = V4L2_PIX_FMT_UYVY;
@@ -853,53 +858,53 @@ static u32 ccdc_get_pixel_format(void)
}
static int ccdc_set_image_window(struct v4l2_rect *win)
{
- if (ccdc_if_type == VPFE_RAW_BAYER)
- ccdc_hw_params_raw.win = *win;
+ if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
+ ccdc_cfg.bayer.win = *win;
else
- ccdc_hw_params_ycbcr.win = *win;
+ ccdc_cfg.ycbcr.win = *win;
return 0;
}
static void ccdc_get_image_window(struct v4l2_rect *win)
{
- if (ccdc_if_type == VPFE_RAW_BAYER)
- *win = ccdc_hw_params_raw.win;
+ if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
+ *win = ccdc_cfg.bayer.win;
else
- *win = ccdc_hw_params_ycbcr.win;
+ *win = ccdc_cfg.ycbcr.win;
}
static unsigned int ccdc_get_line_length(void)
{
struct ccdc_config_params_raw *config_params =
- &ccdc_hw_params_raw.config_params;
+ &ccdc_cfg.bayer.config_params;
unsigned int len;
- if (ccdc_if_type == VPFE_RAW_BAYER) {
+ if (ccdc_cfg.if_type == VPFE_RAW_BAYER) {
if ((config_params->alaw.enable) ||
(config_params->data_sz == CCDC_DATA_8BITS))
- len = ccdc_hw_params_raw.win.width;
+ len = ccdc_cfg.bayer.win.width;
else
- len = ccdc_hw_params_raw.win.width * 2;
+ len = ccdc_cfg.bayer.win.width * 2;
} else
- len = ccdc_hw_params_ycbcr.win.width * 2;
+ len = ccdc_cfg.ycbcr.win.width * 2;
return ALIGN(len, 32);
}
static int ccdc_set_frame_format(enum ccdc_frmfmt frm_fmt)
{
- if (ccdc_if_type == VPFE_RAW_BAYER)
- ccdc_hw_params_raw.frm_fmt = frm_fmt;
+ if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
+ ccdc_cfg.bayer.frm_fmt = frm_fmt;
else
- ccdc_hw_params_ycbcr.frm_fmt = frm_fmt;
+ ccdc_cfg.ycbcr.frm_fmt = frm_fmt;
return 0;
}
static enum ccdc_frmfmt ccdc_get_frame_format(void)
{
- if (ccdc_if_type == VPFE_RAW_BAYER)
- return ccdc_hw_params_raw.frm_fmt;
+ if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
+ return ccdc_cfg.bayer.frm_fmt;
else
- return ccdc_hw_params_ycbcr.frm_fmt;
+ return ccdc_cfg.ycbcr.frm_fmt;
}
static int ccdc_getfid(void)
@@ -916,14 +921,14 @@ static inline void ccdc_setfbaddr(unsigned long addr)
static int ccdc_set_hw_if_params(struct vpfe_hw_if_param *params)
{
- ccdc_if_type = params->if_type;
+ ccdc_cfg.if_type = params->if_type;
switch (params->if_type) {
case VPFE_BT656:
case VPFE_YCBCR_SYNC_16:
case VPFE_YCBCR_SYNC_8:
- ccdc_hw_params_ycbcr.vd_pol = params->vdpol;
- ccdc_hw_params_ycbcr.hd_pol = params->hdpol;
+ ccdc_cfg.ycbcr.vd_pol = params->vdpol;
+ ccdc_cfg.ycbcr.hd_pol = params->hdpol;
break;
default:
/* TODO add support for raw bayer here */
@@ -938,7 +943,6 @@ static struct ccdc_hw_device ccdc_hw_dev = {
.hw_ops = {
.open = ccdc_open,
.close = ccdc_close,
- .set_ccdc_base = ccdc_set_ccdc_base,
.enable = ccdc_enable,
.enable_out_to_sdram = ccdc_enable_output_to_sdram,
.set_hw_if_params = ccdc_set_hw_if_params,
@@ -959,19 +963,118 @@ static struct ccdc_hw_device ccdc_hw_dev = {
},
};
-static int __init dm355_ccdc_init(void)
+static int __init dm355_ccdc_probe(struct platform_device *pdev)
{
- printk(KERN_NOTICE "dm355_ccdc_init\n");
- if (vpfe_register_ccdc_device(&ccdc_hw_dev) < 0)
- return -1;
- printk(KERN_NOTICE "%s is registered with vpfe.\n",
- ccdc_hw_dev.name);
+ void (*setup_pinmux)(void);
+ struct resource *res;
+ int status = 0;
+
+ /*
+ * first try to register with vpfe. If not correct platform, then we
+ * don't have to iomap
+ */
+ status = vpfe_register_ccdc_device(&ccdc_hw_dev);
+ if (status < 0)
+ return status;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res) {
+ status = -ENODEV;
+ goto fail_nores;
+ }
+
+ res = request_mem_region(res->start, resource_size(res), res->name);
+ if (!res) {
+ status = -EBUSY;
+ goto fail_nores;
+ }
+
+ ccdc_cfg.base_addr = ioremap_nocache(res->start, resource_size(res));
+ if (!ccdc_cfg.base_addr) {
+ status = -ENOMEM;
+ goto fail_nomem;
+ }
+
+ /* Get and enable Master clock */
+ ccdc_cfg.mclk = clk_get(&pdev->dev, "master");
+ if (NULL == ccdc_cfg.mclk) {
+ status = -ENODEV;
+ goto fail_nomap;
+ }
+ if (clk_enable(ccdc_cfg.mclk)) {
+ status = -ENODEV;
+ goto fail_mclk;
+ }
+
+ /* Get and enable Slave clock */
+ ccdc_cfg.sclk = clk_get(&pdev->dev, "slave");
+ if (NULL == ccdc_cfg.sclk) {
+ status = -ENODEV;
+ goto fail_mclk;
+ }
+ if (clk_enable(ccdc_cfg.sclk)) {
+ status = -ENODEV;
+ goto fail_sclk;
+ }
+
+ /* Platform data holds setup_pinmux function ptr */
+ if (NULL == pdev->dev.platform_data) {
+ status = -ENODEV;
+ goto fail_sclk;
+ }
+ setup_pinmux = pdev->dev.platform_data;
+ /*
+ * setup Mux configuration for ccdc which may be different for
+ * different SoCs using this CCDC
+ */
+ setup_pinmux();
+ ccdc_cfg.dev = &pdev->dev;
+ printk(KERN_NOTICE "%s is registered with vpfe.\n", ccdc_hw_dev.name);
return 0;
+fail_sclk:
+ clk_put(ccdc_cfg.sclk);
+fail_mclk:
+ clk_put(ccdc_cfg.mclk);
+fail_nomap:
+ iounmap(ccdc_cfg.base_addr);
+fail_nomem:
+ release_mem_region(res->start, resource_size(res));
+fail_nores:
+ vpfe_unregister_ccdc_device(&ccdc_hw_dev);
+ return status;
}
-static void __exit dm355_ccdc_exit(void)
+static int dm355_ccdc_remove(struct platform_device *pdev)
{
+ struct resource *res;
+
+ clk_put(ccdc_cfg.mclk);
+ clk_put(ccdc_cfg.sclk);
+ iounmap(ccdc_cfg.base_addr);
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (res)
+ release_mem_region(res->start, resource_size(res));
vpfe_unregister_ccdc_device(&ccdc_hw_dev);
+ return 0;
+}
+
+static struct platform_driver dm355_ccdc_driver = {
+ .driver = {
+ .name = "dm355_ccdc",
+ .owner = THIS_MODULE,
+ },
+ .remove = __devexit_p(dm355_ccdc_remove),
+ .probe = dm355_ccdc_probe,
+};
+
+static int __init dm355_ccdc_init(void)
+{
+ return platform_driver_register(&dm355_ccdc_driver);
+}
+
+static void __exit dm355_ccdc_exit(void)
+{
+ platform_driver_unregister(&dm355_ccdc_driver);
}
module_init(dm355_ccdc_init);
--
1.6.0.4
^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH - v4 2/4] V4L-vpfe-capture-converting dm355 ccdc driver to a platform driver
2010-01-11 19:22 ` [PATCH - v4 2/4] V4L-vpfe-capture-converting dm355 ccdc driver to a platform driver m-karicheri2
@ 2010-01-11 21:38 ` Kevin Hilman
0 siblings, 0 replies; 11+ messages in thread
From: Kevin Hilman @ 2010-01-11 21:38 UTC (permalink / raw)
To: m-karicheri2; +Cc: linux-media, mchehab, hverkuil, davinci-linux-open-source
m-karicheri2@ti.com writes:
> From: Muralidharan Karicheri <m-karicheri2@ti.com>
>
> Rebased to latest linux-next tree
>
> Updated based on Kevin's comments on clock configuration.
Since the above comments are useful for reviewers but not for the git
history, the should come after the '---' separator. That way they
are not included in the git history.
Kevin
> The ccdc now uses a generic name for clocks. "master" and "slave". On individual platforms
> these clocks will inherit from the platform specific clock. This will allow re-use of
> the driver for the same IP across different SoCs.
>
> Following are the changes done:-
> 1) clocks are configured using generic clock names
> 2) converting the driver to a platform driver
> 3) cleanup - consolidate all static variables inside a structure, ccdc_cfg
>
> Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com>
> Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com>
> Reviewed-by: Hans Verkuil <hverkuil@xs4all.nl>
>
> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
> Signed-off-by: Muralidharan Karicheri <m-karicheri2@ti.com>
> ---
> Applies to linux-next branch of v4l-dvb
> drivers/media/video/davinci/dm355_ccdc.c | 409 +++++++++++++++++++-----------
> 1 files changed, 256 insertions(+), 153 deletions(-)
>
> diff --git a/drivers/media/video/davinci/dm355_ccdc.c b/drivers/media/video/davinci/dm355_ccdc.c
> index 3143900..fc716ed 100644
> --- a/drivers/media/video/davinci/dm355_ccdc.c
> +++ b/drivers/media/video/davinci/dm355_ccdc.c
> @@ -37,8 +37,11 @@
> #include <linux/platform_device.h>
> #include <linux/uaccess.h>
> #include <linux/videodev2.h>
> +#include <linux/clk.h>
> +
> #include <media/davinci/dm355_ccdc.h>
> #include <media/davinci/vpss.h>
> +
> #include "dm355_ccdc_regs.h"
> #include "ccdc_hw_device.h"
>
> @@ -46,67 +49,75 @@ MODULE_LICENSE("GPL");
> MODULE_DESCRIPTION("CCDC Driver for DM355");
> MODULE_AUTHOR("Texas Instruments");
>
> -static struct device *dev;
> -
> -/* Object for CCDC raw mode */
> -static struct ccdc_params_raw ccdc_hw_params_raw = {
> - .pix_fmt = CCDC_PIXFMT_RAW,
> - .frm_fmt = CCDC_FRMFMT_PROGRESSIVE,
> - .win = CCDC_WIN_VGA,
> - .fid_pol = VPFE_PINPOL_POSITIVE,
> - .vd_pol = VPFE_PINPOL_POSITIVE,
> - .hd_pol = VPFE_PINPOL_POSITIVE,
> - .gain = {
> - .r_ye = 256,
> - .gb_g = 256,
> - .gr_cy = 256,
> - .b_mg = 256
> - },
> - .config_params = {
> - .datasft = 2,
> - .data_sz = CCDC_DATA_10BITS,
> - .mfilt1 = CCDC_NO_MEDIAN_FILTER1,
> - .mfilt2 = CCDC_NO_MEDIAN_FILTER2,
> - .alaw = {
> - .gama_wd = 2,
> +static struct ccdc_oper_config {
> + struct device *dev;
> + /* CCDC interface type */
> + enum vpfe_hw_if_type if_type;
> + /* Raw Bayer configuration */
> + struct ccdc_params_raw bayer;
> + /* YCbCr configuration */
> + struct ccdc_params_ycbcr ycbcr;
> + /* Master clock */
> + struct clk *mclk;
> + /* slave clock */
> + struct clk *sclk;
> + /* ccdc base address */
> + void __iomem *base_addr;
> +} ccdc_cfg = {
> + /* Raw configurations */
> + .bayer = {
> + .pix_fmt = CCDC_PIXFMT_RAW,
> + .frm_fmt = CCDC_FRMFMT_PROGRESSIVE,
> + .win = CCDC_WIN_VGA,
> + .fid_pol = VPFE_PINPOL_POSITIVE,
> + .vd_pol = VPFE_PINPOL_POSITIVE,
> + .hd_pol = VPFE_PINPOL_POSITIVE,
> + .gain = {
> + .r_ye = 256,
> + .gb_g = 256,
> + .gr_cy = 256,
> + .b_mg = 256
> },
> - .blk_clamp = {
> - .sample_pixel = 1,
> - .dc_sub = 25
> - },
> - .col_pat_field0 = {
> - .olop = CCDC_GREEN_BLUE,
> - .olep = CCDC_BLUE,
> - .elop = CCDC_RED,
> - .elep = CCDC_GREEN_RED
> - },
> - .col_pat_field1 = {
> - .olop = CCDC_GREEN_BLUE,
> - .olep = CCDC_BLUE,
> - .elop = CCDC_RED,
> - .elep = CCDC_GREEN_RED
> + .config_params = {
> + .datasft = 2,
> + .mfilt1 = CCDC_NO_MEDIAN_FILTER1,
> + .mfilt2 = CCDC_NO_MEDIAN_FILTER2,
> + .alaw = {
> + .gama_wd = 2,
> + },
> + .blk_clamp = {
> + .sample_pixel = 1,
> + .dc_sub = 25
> + },
> + .col_pat_field0 = {
> + .olop = CCDC_GREEN_BLUE,
> + .olep = CCDC_BLUE,
> + .elop = CCDC_RED,
> + .elep = CCDC_GREEN_RED
> + },
> + .col_pat_field1 = {
> + .olop = CCDC_GREEN_BLUE,
> + .olep = CCDC_BLUE,
> + .elop = CCDC_RED,
> + .elep = CCDC_GREEN_RED
> + },
> },
> },
> + /* YCbCr configuration */
> + .ycbcr = {
> + .win = CCDC_WIN_PAL,
> + .pix_fmt = CCDC_PIXFMT_YCBCR_8BIT,
> + .frm_fmt = CCDC_FRMFMT_INTERLACED,
> + .fid_pol = VPFE_PINPOL_POSITIVE,
> + .vd_pol = VPFE_PINPOL_POSITIVE,
> + .hd_pol = VPFE_PINPOL_POSITIVE,
> + .bt656_enable = 1,
> + .pix_order = CCDC_PIXORDER_CBYCRY,
> + .buf_type = CCDC_BUFTYPE_FLD_INTERLEAVED
> + },
> };
>
>
> -/* Object for CCDC ycbcr mode */
> -static struct ccdc_params_ycbcr ccdc_hw_params_ycbcr = {
> - .win = CCDC_WIN_PAL,
> - .pix_fmt = CCDC_PIXFMT_YCBCR_8BIT,
> - .frm_fmt = CCDC_FRMFMT_INTERLACED,
> - .fid_pol = VPFE_PINPOL_POSITIVE,
> - .vd_pol = VPFE_PINPOL_POSITIVE,
> - .hd_pol = VPFE_PINPOL_POSITIVE,
> - .bt656_enable = 1,
> - .pix_order = CCDC_PIXORDER_CBYCRY,
> - .buf_type = CCDC_BUFTYPE_FLD_INTERLEAVED
> -};
> -
> -static enum vpfe_hw_if_type ccdc_if_type;
> -static void *__iomem ccdc_base_addr;
> -static int ccdc_addr_size;
> -
> /* Raw Bayer formats */
> static u32 ccdc_raw_bayer_pix_formats[] =
> {V4L2_PIX_FMT_SBGGR8, V4L2_PIX_FMT_SBGGR16};
> @@ -118,18 +129,12 @@ static u32 ccdc_raw_yuv_pix_formats[] =
> /* register access routines */
> static inline u32 regr(u32 offset)
> {
> - return __raw_readl(ccdc_base_addr + offset);
> + return __raw_readl(ccdc_cfg.base_addr + offset);
> }
>
> static inline void regw(u32 val, u32 offset)
> {
> - __raw_writel(val, ccdc_base_addr + offset);
> -}
> -
> -static void ccdc_set_ccdc_base(void *addr, int size)
> -{
> - ccdc_base_addr = addr;
> - ccdc_addr_size = size;
> + __raw_writel(val, ccdc_cfg.base_addr + offset);
> }
>
> static void ccdc_enable(int en)
> @@ -153,12 +158,12 @@ static void ccdc_enable_output_to_sdram(int en)
> static void ccdc_config_gain_offset(void)
> {
> /* configure gain */
> - regw(ccdc_hw_params_raw.gain.r_ye, RYEGAIN);
> - regw(ccdc_hw_params_raw.gain.gr_cy, GRCYGAIN);
> - regw(ccdc_hw_params_raw.gain.gb_g, GBGGAIN);
> - regw(ccdc_hw_params_raw.gain.b_mg, BMGGAIN);
> + regw(ccdc_cfg.bayer.gain.r_ye, RYEGAIN);
> + regw(ccdc_cfg.bayer.gain.gr_cy, GRCYGAIN);
> + regw(ccdc_cfg.bayer.gain.gb_g, GBGGAIN);
> + regw(ccdc_cfg.bayer.gain.b_mg, BMGGAIN);
> /* configure offset */
> - regw(ccdc_hw_params_raw.ccdc_offset, OFFSET);
> + regw(ccdc_cfg.bayer.ccdc_offset, OFFSET);
> }
>
> /*
> @@ -169,7 +174,7 @@ static int ccdc_restore_defaults(void)
> {
> int i;
>
> - dev_dbg(dev, "\nstarting ccdc_restore_defaults...");
> + dev_dbg(ccdc_cfg.dev, "\nstarting ccdc_restore_defaults...");
> /* set all registers to zero */
> for (i = 0; i <= CCDC_REG_LAST; i += 4)
> regw(0, i);
> @@ -180,30 +185,29 @@ static int ccdc_restore_defaults(void)
> regw(CULH_DEFAULT, CULH);
> regw(CULV_DEFAULT, CULV);
> /* Set default Gain and Offset */
> - ccdc_hw_params_raw.gain.r_ye = GAIN_DEFAULT;
> - ccdc_hw_params_raw.gain.gb_g = GAIN_DEFAULT;
> - ccdc_hw_params_raw.gain.gr_cy = GAIN_DEFAULT;
> - ccdc_hw_params_raw.gain.b_mg = GAIN_DEFAULT;
> + ccdc_cfg.bayer.gain.r_ye = GAIN_DEFAULT;
> + ccdc_cfg.bayer.gain.gb_g = GAIN_DEFAULT;
> + ccdc_cfg.bayer.gain.gr_cy = GAIN_DEFAULT;
> + ccdc_cfg.bayer.gain.b_mg = GAIN_DEFAULT;
> ccdc_config_gain_offset();
> regw(OUTCLIP_DEFAULT, OUTCLIP);
> regw(LSCCFG2_DEFAULT, LSCCFG2);
> /* select ccdc input */
> if (vpss_select_ccdc_source(VPSS_CCDCIN)) {
> - dev_dbg(dev, "\ncouldn't select ccdc input source");
> + dev_dbg(ccdc_cfg.dev, "\ncouldn't select ccdc input source");
> return -EFAULT;
> }
> /* select ccdc clock */
> if (vpss_enable_clock(VPSS_CCDC_CLOCK, 1) < 0) {
> - dev_dbg(dev, "\ncouldn't enable ccdc clock");
> + dev_dbg(ccdc_cfg.dev, "\ncouldn't enable ccdc clock");
> return -EFAULT;
> }
> - dev_dbg(dev, "\nEnd of ccdc_restore_defaults...");
> + dev_dbg(ccdc_cfg.dev, "\nEnd of ccdc_restore_defaults...");
> return 0;
> }
>
> static int ccdc_open(struct device *device)
> {
> - dev = device;
> return ccdc_restore_defaults();
> }
>
> @@ -226,7 +230,7 @@ static void ccdc_setwin(struct v4l2_rect *image_win,
> int vert_start, vert_nr_lines;
> int mid_img = 0;
>
> - dev_dbg(dev, "\nStarting ccdc_setwin...");
> + dev_dbg(ccdc_cfg.dev, "\nStarting ccdc_setwin...");
>
> /*
> * ppc - per pixel count. indicates how many pixels per cell
> @@ -260,45 +264,46 @@ static void ccdc_setwin(struct v4l2_rect *image_win,
> regw(vert_start & CCDC_START_VER_ONE_MASK, SLV0);
> regw(vert_start & CCDC_START_VER_TWO_MASK, SLV1);
> regw(vert_nr_lines & CCDC_NUM_LINES_VER, NLV);
> - dev_dbg(dev, "\nEnd of ccdc_setwin...");
> + dev_dbg(ccdc_cfg.dev, "\nEnd of ccdc_setwin...");
> }
>
> static int validate_ccdc_param(struct ccdc_config_params_raw *ccdcparam)
> {
> if (ccdcparam->datasft < CCDC_DATA_NO_SHIFT ||
> ccdcparam->datasft > CCDC_DATA_SHIFT_6BIT) {
> - dev_dbg(dev, "Invalid value of data shift\n");
> + dev_dbg(ccdc_cfg.dev, "Invalid value of data shift\n");
> return -EINVAL;
> }
>
> if (ccdcparam->mfilt1 < CCDC_NO_MEDIAN_FILTER1 ||
> ccdcparam->mfilt1 > CCDC_MEDIAN_FILTER1) {
> - dev_dbg(dev, "Invalid value of median filter1\n");
> + dev_dbg(ccdc_cfg.dev, "Invalid value of median filter1\n");
> return -EINVAL;
> }
>
> if (ccdcparam->mfilt2 < CCDC_NO_MEDIAN_FILTER2 ||
> ccdcparam->mfilt2 > CCDC_MEDIAN_FILTER2) {
> - dev_dbg(dev, "Invalid value of median filter2\n");
> + dev_dbg(ccdc_cfg.dev, "Invalid value of median filter2\n");
> return -EINVAL;
> }
>
> if ((ccdcparam->med_filt_thres < 0) ||
> (ccdcparam->med_filt_thres > CCDC_MED_FILT_THRESH)) {
> - dev_dbg(dev, "Invalid value of median filter threshold\n");
> + dev_dbg(ccdc_cfg.dev,
> + "Invalid value of median filter thresold\n");
> return -EINVAL;
> }
>
> if (ccdcparam->data_sz < CCDC_DATA_16BITS ||
> ccdcparam->data_sz > CCDC_DATA_8BITS) {
> - dev_dbg(dev, "Invalid value of data size\n");
> + dev_dbg(ccdc_cfg.dev, "Invalid value of data size\n");
> return -EINVAL;
> }
>
> if (ccdcparam->alaw.enable) {
> if (ccdcparam->alaw.gama_wd < CCDC_GAMMA_BITS_13_4 ||
> ccdcparam->alaw.gama_wd > CCDC_GAMMA_BITS_09_0) {
> - dev_dbg(dev, "Invalid value of ALAW\n");
> + dev_dbg(ccdc_cfg.dev, "Invalid value of ALAW\n");
> return -EINVAL;
> }
> }
> @@ -306,12 +311,14 @@ static int validate_ccdc_param(struct ccdc_config_params_raw *ccdcparam)
> if (ccdcparam->blk_clamp.b_clamp_enable) {
> if (ccdcparam->blk_clamp.sample_pixel < CCDC_SAMPLE_1PIXELS ||
> ccdcparam->blk_clamp.sample_pixel > CCDC_SAMPLE_16PIXELS) {
> - dev_dbg(dev, "Invalid value of sample pixel\n");
> + dev_dbg(ccdc_cfg.dev,
> + "Invalid value of sample pixel\n");
> return -EINVAL;
> }
> if (ccdcparam->blk_clamp.sample_ln < CCDC_SAMPLE_1LINES ||
> ccdcparam->blk_clamp.sample_ln > CCDC_SAMPLE_16LINES) {
> - dev_dbg(dev, "Invalid value of sample lines\n");
> + dev_dbg(ccdc_cfg.dev,
> + "Invalid value of sample lines\n");
> return -EINVAL;
> }
> }
> @@ -325,18 +332,18 @@ static int ccdc_set_params(void __user *params)
> int x;
>
> /* only raw module parameters can be set through the IOCTL */
> - if (ccdc_if_type != VPFE_RAW_BAYER)
> + if (ccdc_cfg.if_type != VPFE_RAW_BAYER)
> return -EINVAL;
>
> x = copy_from_user(&ccdc_raw_params, params, sizeof(ccdc_raw_params));
> if (x) {
> - dev_dbg(dev, "ccdc_set_params: error in copying ccdc"
> + dev_dbg(ccdc_cfg.dev, "ccdc_set_params: error in copying ccdc"
> "params, %d\n", x);
> return -EFAULT;
> }
>
> if (!validate_ccdc_param(&ccdc_raw_params)) {
> - memcpy(&ccdc_hw_params_raw.config_params,
> + memcpy(&ccdc_cfg.bayer.config_params,
> &ccdc_raw_params,
> sizeof(ccdc_raw_params));
> return 0;
> @@ -347,11 +354,11 @@ static int ccdc_set_params(void __user *params)
> /* This function will configure CCDC for YCbCr video capture */
> static void ccdc_config_ycbcr(void)
> {
> - struct ccdc_params_ycbcr *params = &ccdc_hw_params_ycbcr;
> + struct ccdc_params_ycbcr *params = &ccdc_cfg.ycbcr;
> u32 temp;
>
> /* first set the CCDC power on defaults values in all registers */
> - dev_dbg(dev, "\nStarting ccdc_config_ycbcr...");
> + dev_dbg(ccdc_cfg.dev, "\nStarting ccdc_config_ycbcr...");
> ccdc_restore_defaults();
>
> /* configure pixel format & video frame format */
> @@ -403,7 +410,7 @@ static void ccdc_config_ycbcr(void)
> regw(CCDC_SDOFST_FIELD_INTERLEAVED, SDOFST);
> }
>
> - dev_dbg(dev, "\nEnd of ccdc_config_ycbcr...\n");
> + dev_dbg(ccdc_cfg.dev, "\nEnd of ccdc_config_ycbcr...\n");
> }
>
> /*
> @@ -483,7 +490,7 @@ int ccdc_write_dfc_entry(int index, struct ccdc_vertical_dft *dfc)
> */
>
> if (count) {
> - dev_err(dev, "defect table write timeout !!!\n");
> + dev_err(ccdc_cfg.dev, "defect table write timeout !!!\n");
> return -1;
> }
> return 0;
> @@ -605,12 +612,12 @@ static void ccdc_config_color_patterns(struct ccdc_col_pat *pat0,
> /* This function will configure CCDC for Raw mode image capture */
> static int ccdc_config_raw(void)
> {
> - struct ccdc_params_raw *params = &ccdc_hw_params_raw;
> + struct ccdc_params_raw *params = &ccdc_cfg.bayer;
> struct ccdc_config_params_raw *config_params =
> - &ccdc_hw_params_raw.config_params;
> + &ccdc_cfg.bayer.config_params;
> unsigned int val;
>
> - dev_dbg(dev, "\nStarting ccdc_config_raw...");
> + dev_dbg(ccdc_cfg.dev, "\nStarting ccdc_config_raw...");
>
> /* restore power on defaults to register */
> ccdc_restore_defaults();
> @@ -659,7 +666,7 @@ static int ccdc_config_raw(void)
> val |= (config_params->datasft & CCDC_DATASFT_MASK) <<
> CCDC_DATASFT_SHIFT;
> regw(val , MODESET);
> - dev_dbg(dev, "\nWriting 0x%x to MODESET...\n", val);
> + dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to MODESET...\n", val);
>
> /* Configure the Median Filter threshold */
> regw((config_params->med_filt_thres) & CCDC_MED_FILT_THRESH, MEDFILT);
> @@ -681,7 +688,7 @@ static int ccdc_config_raw(void)
> (config_params->mfilt2 << CCDC_MFILT2_SHIFT));
>
> regw(val, GAMMAWD);
> - dev_dbg(dev, "\nWriting 0x%x to GAMMAWD...\n", val);
> + dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to GAMMAWD...\n", val);
>
> /* configure video window */
> ccdc_setwin(¶ms->win, params->frm_fmt, 1);
> @@ -706,7 +713,7 @@ static int ccdc_config_raw(void)
> /* Configure the Gain & offset control */
> ccdc_config_gain_offset();
>
> - dev_dbg(dev, "\nWriting %x to COLPTN...\n", val);
> + dev_dbg(ccdc_cfg.dev, "\nWriting %x to COLPTN...\n", val);
>
> /* Configure DATAOFST register */
> val = (config_params->data_offset.horz_offset & CCDC_DATAOFST_MASK) <<
> @@ -726,7 +733,7 @@ static int ccdc_config_raw(void)
> CCDC_HSIZE_VAL_MASK;
>
> /* adjust to multiple of 32 */
> - dev_dbg(dev, "\nWriting 0x%x to HSIZE...\n",
> + dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to HSIZE...\n",
> (((params->win.width) + 31) >> 5) &
> CCDC_HSIZE_VAL_MASK);
> } else {
> @@ -734,7 +741,7 @@ static int ccdc_config_raw(void)
> val |= (((params->win.width * 2) + 31) >> 5) &
> CCDC_HSIZE_VAL_MASK;
>
> - dev_dbg(dev, "\nWriting 0x%x to HSIZE...\n",
> + dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to HSIZE...\n",
> (((params->win.width * 2) + 31) >> 5) &
> CCDC_HSIZE_VAL_MASK);
> }
> @@ -745,34 +752,34 @@ static int ccdc_config_raw(void)
> if (params->image_invert_enable) {
> /* For interlace inverse mode */
> regw(CCDC_SDOFST_INTERLACE_INVERSE, SDOFST);
> - dev_dbg(dev, "\nWriting %x to SDOFST...\n",
> + dev_dbg(ccdc_cfg.dev, "\nWriting %x to SDOFST...\n",
> CCDC_SDOFST_INTERLACE_INVERSE);
> } else {
> /* For interlace non inverse mode */
> regw(CCDC_SDOFST_INTERLACE_NORMAL, SDOFST);
> - dev_dbg(dev, "\nWriting %x to SDOFST...\n",
> + dev_dbg(ccdc_cfg.dev, "\nWriting %x to SDOFST...\n",
> CCDC_SDOFST_INTERLACE_NORMAL);
> }
> } else if (params->frm_fmt == CCDC_FRMFMT_PROGRESSIVE) {
> if (params->image_invert_enable) {
> /* For progessive inverse mode */
> regw(CCDC_SDOFST_PROGRESSIVE_INVERSE, SDOFST);
> - dev_dbg(dev, "\nWriting %x to SDOFST...\n",
> + dev_dbg(ccdc_cfg.dev, "\nWriting %x to SDOFST...\n",
> CCDC_SDOFST_PROGRESSIVE_INVERSE);
> } else {
> /* For progessive non inverse mode */
> regw(CCDC_SDOFST_PROGRESSIVE_NORMAL, SDOFST);
> - dev_dbg(dev, "\nWriting %x to SDOFST...\n",
> + dev_dbg(ccdc_cfg.dev, "\nWriting %x to SDOFST...\n",
> CCDC_SDOFST_PROGRESSIVE_NORMAL);
> }
> }
> - dev_dbg(dev, "\nend of ccdc_config_raw...");
> + dev_dbg(ccdc_cfg.dev, "\nend of ccdc_config_raw...");
> return 0;
> }
>
> static int ccdc_configure(void)
> {
> - if (ccdc_if_type == VPFE_RAW_BAYER)
> + if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
> return ccdc_config_raw();
> else
> ccdc_config_ycbcr();
> @@ -781,23 +788,23 @@ static int ccdc_configure(void)
>
> static int ccdc_set_buftype(enum ccdc_buftype buf_type)
> {
> - if (ccdc_if_type == VPFE_RAW_BAYER)
> - ccdc_hw_params_raw.buf_type = buf_type;
> + if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
> + ccdc_cfg.bayer.buf_type = buf_type;
> else
> - ccdc_hw_params_ycbcr.buf_type = buf_type;
> + ccdc_cfg.ycbcr.buf_type = buf_type;
> return 0;
> }
> static enum ccdc_buftype ccdc_get_buftype(void)
> {
> - if (ccdc_if_type == VPFE_RAW_BAYER)
> - return ccdc_hw_params_raw.buf_type;
> - return ccdc_hw_params_ycbcr.buf_type;
> + if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
> + return ccdc_cfg.bayer.buf_type;
> + return ccdc_cfg.ycbcr.buf_type;
> }
>
> static int ccdc_enum_pix(u32 *pix, int i)
> {
> int ret = -EINVAL;
> - if (ccdc_if_type == VPFE_RAW_BAYER) {
> + if (ccdc_cfg.if_type == VPFE_RAW_BAYER) {
> if (i < ARRAY_SIZE(ccdc_raw_bayer_pix_formats)) {
> *pix = ccdc_raw_bayer_pix_formats[i];
> ret = 0;
> @@ -813,20 +820,19 @@ static int ccdc_enum_pix(u32 *pix, int i)
>
> static int ccdc_set_pixel_format(u32 pixfmt)
> {
> - struct ccdc_a_law *alaw =
> - &ccdc_hw_params_raw.config_params.alaw;
> + struct ccdc_a_law *alaw = &ccdc_cfg.bayer.config_params.alaw;
>
> - if (ccdc_if_type == VPFE_RAW_BAYER) {
> - ccdc_hw_params_raw.pix_fmt = CCDC_PIXFMT_RAW;
> + if (ccdc_cfg.if_type == VPFE_RAW_BAYER) {
> + ccdc_cfg.bayer.pix_fmt = CCDC_PIXFMT_RAW;
> if (pixfmt == V4L2_PIX_FMT_SBGGR8)
> alaw->enable = 1;
> else if (pixfmt != V4L2_PIX_FMT_SBGGR16)
> return -EINVAL;
> } else {
> if (pixfmt == V4L2_PIX_FMT_YUYV)
> - ccdc_hw_params_ycbcr.pix_order = CCDC_PIXORDER_YCBYCR;
> + ccdc_cfg.ycbcr.pix_order = CCDC_PIXORDER_YCBYCR;
> else if (pixfmt == V4L2_PIX_FMT_UYVY)
> - ccdc_hw_params_ycbcr.pix_order = CCDC_PIXORDER_CBYCRY;
> + ccdc_cfg.ycbcr.pix_order = CCDC_PIXORDER_CBYCRY;
> else
> return -EINVAL;
> }
> @@ -834,17 +840,16 @@ static int ccdc_set_pixel_format(u32 pixfmt)
> }
> static u32 ccdc_get_pixel_format(void)
> {
> - struct ccdc_a_law *alaw =
> - &ccdc_hw_params_raw.config_params.alaw;
> + struct ccdc_a_law *alaw = &ccdc_cfg.bayer.config_params.alaw;
> u32 pixfmt;
>
> - if (ccdc_if_type == VPFE_RAW_BAYER)
> + if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
> if (alaw->enable)
> pixfmt = V4L2_PIX_FMT_SBGGR8;
> else
> pixfmt = V4L2_PIX_FMT_SBGGR16;
> else {
> - if (ccdc_hw_params_ycbcr.pix_order == CCDC_PIXORDER_YCBYCR)
> + if (ccdc_cfg.ycbcr.pix_order == CCDC_PIXORDER_YCBYCR)
> pixfmt = V4L2_PIX_FMT_YUYV;
> else
> pixfmt = V4L2_PIX_FMT_UYVY;
> @@ -853,53 +858,53 @@ static u32 ccdc_get_pixel_format(void)
> }
> static int ccdc_set_image_window(struct v4l2_rect *win)
> {
> - if (ccdc_if_type == VPFE_RAW_BAYER)
> - ccdc_hw_params_raw.win = *win;
> + if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
> + ccdc_cfg.bayer.win = *win;
> else
> - ccdc_hw_params_ycbcr.win = *win;
> + ccdc_cfg.ycbcr.win = *win;
> return 0;
> }
>
> static void ccdc_get_image_window(struct v4l2_rect *win)
> {
> - if (ccdc_if_type == VPFE_RAW_BAYER)
> - *win = ccdc_hw_params_raw.win;
> + if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
> + *win = ccdc_cfg.bayer.win;
> else
> - *win = ccdc_hw_params_ycbcr.win;
> + *win = ccdc_cfg.ycbcr.win;
> }
>
> static unsigned int ccdc_get_line_length(void)
> {
> struct ccdc_config_params_raw *config_params =
> - &ccdc_hw_params_raw.config_params;
> + &ccdc_cfg.bayer.config_params;
> unsigned int len;
>
> - if (ccdc_if_type == VPFE_RAW_BAYER) {
> + if (ccdc_cfg.if_type == VPFE_RAW_BAYER) {
> if ((config_params->alaw.enable) ||
> (config_params->data_sz == CCDC_DATA_8BITS))
> - len = ccdc_hw_params_raw.win.width;
> + len = ccdc_cfg.bayer.win.width;
> else
> - len = ccdc_hw_params_raw.win.width * 2;
> + len = ccdc_cfg.bayer.win.width * 2;
> } else
> - len = ccdc_hw_params_ycbcr.win.width * 2;
> + len = ccdc_cfg.ycbcr.win.width * 2;
> return ALIGN(len, 32);
> }
>
> static int ccdc_set_frame_format(enum ccdc_frmfmt frm_fmt)
> {
> - if (ccdc_if_type == VPFE_RAW_BAYER)
> - ccdc_hw_params_raw.frm_fmt = frm_fmt;
> + if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
> + ccdc_cfg.bayer.frm_fmt = frm_fmt;
> else
> - ccdc_hw_params_ycbcr.frm_fmt = frm_fmt;
> + ccdc_cfg.ycbcr.frm_fmt = frm_fmt;
> return 0;
> }
>
> static enum ccdc_frmfmt ccdc_get_frame_format(void)
> {
> - if (ccdc_if_type == VPFE_RAW_BAYER)
> - return ccdc_hw_params_raw.frm_fmt;
> + if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
> + return ccdc_cfg.bayer.frm_fmt;
> else
> - return ccdc_hw_params_ycbcr.frm_fmt;
> + return ccdc_cfg.ycbcr.frm_fmt;
> }
>
> static int ccdc_getfid(void)
> @@ -916,14 +921,14 @@ static inline void ccdc_setfbaddr(unsigned long addr)
>
> static int ccdc_set_hw_if_params(struct vpfe_hw_if_param *params)
> {
> - ccdc_if_type = params->if_type;
> + ccdc_cfg.if_type = params->if_type;
>
> switch (params->if_type) {
> case VPFE_BT656:
> case VPFE_YCBCR_SYNC_16:
> case VPFE_YCBCR_SYNC_8:
> - ccdc_hw_params_ycbcr.vd_pol = params->vdpol;
> - ccdc_hw_params_ycbcr.hd_pol = params->hdpol;
> + ccdc_cfg.ycbcr.vd_pol = params->vdpol;
> + ccdc_cfg.ycbcr.hd_pol = params->hdpol;
> break;
> default:
> /* TODO add support for raw bayer here */
> @@ -938,7 +943,6 @@ static struct ccdc_hw_device ccdc_hw_dev = {
> .hw_ops = {
> .open = ccdc_open,
> .close = ccdc_close,
> - .set_ccdc_base = ccdc_set_ccdc_base,
> .enable = ccdc_enable,
> .enable_out_to_sdram = ccdc_enable_output_to_sdram,
> .set_hw_if_params = ccdc_set_hw_if_params,
> @@ -959,19 +963,118 @@ static struct ccdc_hw_device ccdc_hw_dev = {
> },
> };
>
> -static int __init dm355_ccdc_init(void)
> +static int __init dm355_ccdc_probe(struct platform_device *pdev)
> {
> - printk(KERN_NOTICE "dm355_ccdc_init\n");
> - if (vpfe_register_ccdc_device(&ccdc_hw_dev) < 0)
> - return -1;
> - printk(KERN_NOTICE "%s is registered with vpfe.\n",
> - ccdc_hw_dev.name);
> + void (*setup_pinmux)(void);
> + struct resource *res;
> + int status = 0;
> +
> + /*
> + * first try to register with vpfe. If not correct platform, then we
> + * don't have to iomap
> + */
> + status = vpfe_register_ccdc_device(&ccdc_hw_dev);
> + if (status < 0)
> + return status;
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + if (!res) {
> + status = -ENODEV;
> + goto fail_nores;
> + }
> +
> + res = request_mem_region(res->start, resource_size(res), res->name);
> + if (!res) {
> + status = -EBUSY;
> + goto fail_nores;
> + }
> +
> + ccdc_cfg.base_addr = ioremap_nocache(res->start, resource_size(res));
> + if (!ccdc_cfg.base_addr) {
> + status = -ENOMEM;
> + goto fail_nomem;
> + }
> +
> + /* Get and enable Master clock */
> + ccdc_cfg.mclk = clk_get(&pdev->dev, "master");
> + if (NULL == ccdc_cfg.mclk) {
> + status = -ENODEV;
> + goto fail_nomap;
> + }
> + if (clk_enable(ccdc_cfg.mclk)) {
> + status = -ENODEV;
> + goto fail_mclk;
> + }
> +
> + /* Get and enable Slave clock */
> + ccdc_cfg.sclk = clk_get(&pdev->dev, "slave");
> + if (NULL == ccdc_cfg.sclk) {
> + status = -ENODEV;
> + goto fail_mclk;
> + }
> + if (clk_enable(ccdc_cfg.sclk)) {
> + status = -ENODEV;
> + goto fail_sclk;
> + }
> +
> + /* Platform data holds setup_pinmux function ptr */
> + if (NULL == pdev->dev.platform_data) {
> + status = -ENODEV;
> + goto fail_sclk;
> + }
> + setup_pinmux = pdev->dev.platform_data;
> + /*
> + * setup Mux configuration for ccdc which may be different for
> + * different SoCs using this CCDC
> + */
> + setup_pinmux();
> + ccdc_cfg.dev = &pdev->dev;
> + printk(KERN_NOTICE "%s is registered with vpfe.\n", ccdc_hw_dev.name);
> return 0;
> +fail_sclk:
> + clk_put(ccdc_cfg.sclk);
> +fail_mclk:
> + clk_put(ccdc_cfg.mclk);
> +fail_nomap:
> + iounmap(ccdc_cfg.base_addr);
> +fail_nomem:
> + release_mem_region(res->start, resource_size(res));
> +fail_nores:
> + vpfe_unregister_ccdc_device(&ccdc_hw_dev);
> + return status;
> }
>
> -static void __exit dm355_ccdc_exit(void)
> +static int dm355_ccdc_remove(struct platform_device *pdev)
> {
> + struct resource *res;
> +
> + clk_put(ccdc_cfg.mclk);
> + clk_put(ccdc_cfg.sclk);
> + iounmap(ccdc_cfg.base_addr);
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + if (res)
> + release_mem_region(res->start, resource_size(res));
> vpfe_unregister_ccdc_device(&ccdc_hw_dev);
> + return 0;
> +}
> +
> +static struct platform_driver dm355_ccdc_driver = {
> + .driver = {
> + .name = "dm355_ccdc",
> + .owner = THIS_MODULE,
> + },
> + .remove = __devexit_p(dm355_ccdc_remove),
> + .probe = dm355_ccdc_probe,
> +};
> +
> +static int __init dm355_ccdc_init(void)
> +{
> + return platform_driver_register(&dm355_ccdc_driver);
> +}
> +
> +static void __exit dm355_ccdc_exit(void)
> +{
> + platform_driver_unregister(&dm355_ccdc_driver);
> }
>
> module_init(dm355_ccdc_init);
> --
> 1.6.0.4
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH - v4 4/4] DaVinci-vpfe-capture-converting-ccdc-drivers-to-platform-drivers
@ 2010-01-11 23:36 m-karicheri2
2010-01-11 23:36 ` [PATCH - v4 2/4] V4L-vpfe-capture-converting dm355 ccdc driver to a platform driver m-karicheri2
2010-01-12 0:28 ` [PATCH - v4 4/4] DaVinci-vpfe-capture-converting-ccdc-drivers-to-platform-drivers Kevin Hilman
0 siblings, 2 replies; 11+ messages in thread
From: m-karicheri2 @ 2010-01-11 23:36 UTC (permalink / raw)
To: linux-media, khilman, mchehab
Cc: hverkuil, davinci-linux-open-source, Muralidharan Karicheri
From: Muralidharan Karicheri <m-karicheri2@ti.com>
Following are the changes from v3 :-
- added ccdc clocks through clk_add_alias() calls
This combines the two patches sent earlier to change the clock configuration
and converting ccdc drivers to platform drivers. This has updated comments
against v2 of these patches. Two new clocks "master" and "slave" are defined for ccdc driver
as per comments from Kevin Hilman.
This adds platform code for ccdc driver on DM355 and DM6446.
Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com>
Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com>
Reviewed-by: Hans Verkuil <hverkuil@xs4all.nl>
Signed-off-by: Muralidharan Karicheri <m-karicheri2@ti.com>
---
Re-sending the patches based on Kevin's comments.
Applies to Linus tree
arch/arm/mach-davinci/dm355.c | 43 +++++++++++++++++++++++++++------------
arch/arm/mach-davinci/dm644x.c | 21 ++++++++++++++++++-
2 files changed, 50 insertions(+), 14 deletions(-)
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index dedf4d4..d84e854 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -125,7 +125,6 @@ static struct clk vpss_slave_clk = {
.lpsc = DAVINCI_LPSC_VPSSSLV,
};
-
static struct clk clkout1_clk = {
.name = "clkout1",
.parent = &pll1_aux_clk,
@@ -665,6 +664,17 @@ static struct platform_device dm355_asp1_device = {
.resource = dm355_asp1_resources,
};
+static void dm355_ccdc_setup_pinmux(void)
+{
+ davinci_cfg_reg(DM355_VIN_PCLK);
+ davinci_cfg_reg(DM355_VIN_CAM_WEN);
+ davinci_cfg_reg(DM355_VIN_CAM_VD);
+ davinci_cfg_reg(DM355_VIN_CAM_HD);
+ davinci_cfg_reg(DM355_VIN_YIN_EN);
+ davinci_cfg_reg(DM355_VIN_CINL_EN);
+ davinci_cfg_reg(DM355_VIN_CINH_EN);
+}
+
static struct resource dm355_vpss_resources[] = {
{
/* VPSS BL Base address */
@@ -701,6 +711,10 @@ static struct resource vpfe_resources[] = {
.end = IRQ_VDINT1,
.flags = IORESOURCE_IRQ,
},
+};
+
+static u64 vpfe_capture_dma_mask = DMA_BIT_MASK(32);
+static struct resource dm355_ccdc_resource[] = {
/* CCDC Base address */
{
.flags = IORESOURCE_MEM,
@@ -708,8 +722,18 @@ static struct resource vpfe_resources[] = {
.end = 0x01c70600 + 0x1ff,
},
};
+static struct platform_device dm355_ccdc_dev = {
+ .name = "dm355_ccdc",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(dm355_ccdc_resource),
+ .resource = dm355_ccdc_resource,
+ .dev = {
+ .dma_mask = &vpfe_capture_dma_mask,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ .platform_data = dm355_ccdc_setup_pinmux,
+ },
+};
-static u64 vpfe_capture_dma_mask = DMA_BIT_MASK(32);
static struct platform_device vpfe_capture_dev = {
.name = CAPTURE_DRV_NAME,
.id = -1,
@@ -857,20 +881,13 @@ static int __init dm355_init_devices(void)
if (!cpu_is_davinci_dm355())
return 0;
+ /* Add ccdc clock aliases */
+ clk_add_alias("master", dm355_ccdc_dev.name, "vpss_master", NULL);
+ clk_add_alias("slave", dm355_ccdc_dev.name, "vpss_master", NULL);
davinci_cfg_reg(DM355_INT_EDMA_CC);
platform_device_register(&dm355_edma_device);
platform_device_register(&dm355_vpss_device);
- /*
- * setup Mux configuration for vpfe input and register
- * vpfe capture platform device
- */
- davinci_cfg_reg(DM355_VIN_PCLK);
- davinci_cfg_reg(DM355_VIN_CAM_WEN);
- davinci_cfg_reg(DM355_VIN_CAM_VD);
- davinci_cfg_reg(DM355_VIN_CAM_HD);
- davinci_cfg_reg(DM355_VIN_YIN_EN);
- davinci_cfg_reg(DM355_VIN_CINL_EN);
- davinci_cfg_reg(DM355_VIN_CINH_EN);
+ platform_device_register(&dm355_ccdc_dev);
platform_device_register(&vpfe_capture_dev);
return 0;
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 2cd0081..92aeb56 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -612,6 +612,11 @@ static struct resource vpfe_resources[] = {
.end = IRQ_VDINT1,
.flags = IORESOURCE_IRQ,
},
+};
+
+static u64 vpfe_capture_dma_mask = DMA_BIT_MASK(32);
+static struct resource dm644x_ccdc_resource[] = {
+ /* CCDC Base address */
{
.start = 0x01c70400,
.end = 0x01c70400 + 0xff,
@@ -619,7 +624,17 @@ static struct resource vpfe_resources[] = {
},
};
-static u64 vpfe_capture_dma_mask = DMA_BIT_MASK(32);
+static struct platform_device dm644x_ccdc_dev = {
+ .name = "dm644x_ccdc",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(dm644x_ccdc_resource),
+ .resource = dm644x_ccdc_resource,
+ .dev = {
+ .dma_mask = &vpfe_capture_dma_mask,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ },
+};
+
static struct platform_device vpfe_capture_dev = {
.name = CAPTURE_DRV_NAME,
.id = -1,
@@ -769,9 +784,13 @@ static int __init dm644x_init_devices(void)
if (!cpu_is_davinci_dm644x())
return 0;
+ /* Add ccdc clock aliases */
+ clk_add_alias("master", dm644x_ccdc_dev.name, "vpss_master", NULL);
+ clk_add_alias("slave", dm644x_ccdc_dev.name, "vpss_slave", NULL);
platform_device_register(&dm644x_edma_device);
platform_device_register(&dm644x_emac_device);
platform_device_register(&dm644x_vpss_device);
+ platform_device_register(&dm644x_ccdc_dev);
platform_device_register(&vpfe_capture_dev);
return 0;
--
1.6.0.4
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH - v4 2/4] V4L-vpfe-capture-converting dm355 ccdc driver to a platform driver
2010-01-11 23:36 [PATCH - v4 4/4] DaVinci-vpfe-capture-converting-ccdc-drivers-to-platform-drivers m-karicheri2
@ 2010-01-11 23:36 ` m-karicheri2
2010-01-11 23:36 ` [PATCH - v4 3/4] V4L-vpfe-capture-converting-dm644x-driver " m-karicheri2
2010-01-12 0:22 ` [PATCH - v4 2/4] V4L-vpfe-capture-converting dm355 ccdc driver to a platform driver Kevin Hilman
2010-01-12 0:28 ` [PATCH - v4 4/4] DaVinci-vpfe-capture-converting-ccdc-drivers-to-platform-drivers Kevin Hilman
1 sibling, 2 replies; 11+ messages in thread
From: m-karicheri2 @ 2010-01-11 23:36 UTC (permalink / raw)
To: linux-media, khilman, mchehab
Cc: hverkuil, davinci-linux-open-source, Muralidharan Karicheri
From: Muralidharan Karicheri <m-karicheri2@ti.com>
Updated based on Kevin's comments on clock configuration.
The ccdc now uses a generic name for clocks. "master" and "slave". On individual platforms
these clocks will inherit from the platform specific clock. This will allow re-use of
the driver for the same IP across different SoCs.
Following are the changes done:-
1) clocks are configured using generic clock names
2) converting the driver to a platform driver
3) cleanup - consolidate all static variables inside a structure, ccdc_cfg
Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com>
Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com>
Reviewed-by: Hans Verkuil <hverkuil@xs4all.nl>
Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
Signed-off-by: Muralidharan Karicheri <m-karicheri2@ti.com>
---
Rebased to latest linux-next tree
Applies to linux-next branch of v4l-dvb
drivers/media/video/davinci/dm355_ccdc.c | 409 +++++++++++++++++++-----------
1 files changed, 256 insertions(+), 153 deletions(-)
diff --git a/drivers/media/video/davinci/dm355_ccdc.c b/drivers/media/video/davinci/dm355_ccdc.c
index 3143900..fc716ed 100644
--- a/drivers/media/video/davinci/dm355_ccdc.c
+++ b/drivers/media/video/davinci/dm355_ccdc.c
@@ -37,8 +37,11 @@
#include <linux/platform_device.h>
#include <linux/uaccess.h>
#include <linux/videodev2.h>
+#include <linux/clk.h>
+
#include <media/davinci/dm355_ccdc.h>
#include <media/davinci/vpss.h>
+
#include "dm355_ccdc_regs.h"
#include "ccdc_hw_device.h"
@@ -46,67 +49,75 @@ MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("CCDC Driver for DM355");
MODULE_AUTHOR("Texas Instruments");
-static struct device *dev;
-
-/* Object for CCDC raw mode */
-static struct ccdc_params_raw ccdc_hw_params_raw = {
- .pix_fmt = CCDC_PIXFMT_RAW,
- .frm_fmt = CCDC_FRMFMT_PROGRESSIVE,
- .win = CCDC_WIN_VGA,
- .fid_pol = VPFE_PINPOL_POSITIVE,
- .vd_pol = VPFE_PINPOL_POSITIVE,
- .hd_pol = VPFE_PINPOL_POSITIVE,
- .gain = {
- .r_ye = 256,
- .gb_g = 256,
- .gr_cy = 256,
- .b_mg = 256
- },
- .config_params = {
- .datasft = 2,
- .data_sz = CCDC_DATA_10BITS,
- .mfilt1 = CCDC_NO_MEDIAN_FILTER1,
- .mfilt2 = CCDC_NO_MEDIAN_FILTER2,
- .alaw = {
- .gama_wd = 2,
+static struct ccdc_oper_config {
+ struct device *dev;
+ /* CCDC interface type */
+ enum vpfe_hw_if_type if_type;
+ /* Raw Bayer configuration */
+ struct ccdc_params_raw bayer;
+ /* YCbCr configuration */
+ struct ccdc_params_ycbcr ycbcr;
+ /* Master clock */
+ struct clk *mclk;
+ /* slave clock */
+ struct clk *sclk;
+ /* ccdc base address */
+ void __iomem *base_addr;
+} ccdc_cfg = {
+ /* Raw configurations */
+ .bayer = {
+ .pix_fmt = CCDC_PIXFMT_RAW,
+ .frm_fmt = CCDC_FRMFMT_PROGRESSIVE,
+ .win = CCDC_WIN_VGA,
+ .fid_pol = VPFE_PINPOL_POSITIVE,
+ .vd_pol = VPFE_PINPOL_POSITIVE,
+ .hd_pol = VPFE_PINPOL_POSITIVE,
+ .gain = {
+ .r_ye = 256,
+ .gb_g = 256,
+ .gr_cy = 256,
+ .b_mg = 256
},
- .blk_clamp = {
- .sample_pixel = 1,
- .dc_sub = 25
- },
- .col_pat_field0 = {
- .olop = CCDC_GREEN_BLUE,
- .olep = CCDC_BLUE,
- .elop = CCDC_RED,
- .elep = CCDC_GREEN_RED
- },
- .col_pat_field1 = {
- .olop = CCDC_GREEN_BLUE,
- .olep = CCDC_BLUE,
- .elop = CCDC_RED,
- .elep = CCDC_GREEN_RED
+ .config_params = {
+ .datasft = 2,
+ .mfilt1 = CCDC_NO_MEDIAN_FILTER1,
+ .mfilt2 = CCDC_NO_MEDIAN_FILTER2,
+ .alaw = {
+ .gama_wd = 2,
+ },
+ .blk_clamp = {
+ .sample_pixel = 1,
+ .dc_sub = 25
+ },
+ .col_pat_field0 = {
+ .olop = CCDC_GREEN_BLUE,
+ .olep = CCDC_BLUE,
+ .elop = CCDC_RED,
+ .elep = CCDC_GREEN_RED
+ },
+ .col_pat_field1 = {
+ .olop = CCDC_GREEN_BLUE,
+ .olep = CCDC_BLUE,
+ .elop = CCDC_RED,
+ .elep = CCDC_GREEN_RED
+ },
},
},
+ /* YCbCr configuration */
+ .ycbcr = {
+ .win = CCDC_WIN_PAL,
+ .pix_fmt = CCDC_PIXFMT_YCBCR_8BIT,
+ .frm_fmt = CCDC_FRMFMT_INTERLACED,
+ .fid_pol = VPFE_PINPOL_POSITIVE,
+ .vd_pol = VPFE_PINPOL_POSITIVE,
+ .hd_pol = VPFE_PINPOL_POSITIVE,
+ .bt656_enable = 1,
+ .pix_order = CCDC_PIXORDER_CBYCRY,
+ .buf_type = CCDC_BUFTYPE_FLD_INTERLEAVED
+ },
};
-/* Object for CCDC ycbcr mode */
-static struct ccdc_params_ycbcr ccdc_hw_params_ycbcr = {
- .win = CCDC_WIN_PAL,
- .pix_fmt = CCDC_PIXFMT_YCBCR_8BIT,
- .frm_fmt = CCDC_FRMFMT_INTERLACED,
- .fid_pol = VPFE_PINPOL_POSITIVE,
- .vd_pol = VPFE_PINPOL_POSITIVE,
- .hd_pol = VPFE_PINPOL_POSITIVE,
- .bt656_enable = 1,
- .pix_order = CCDC_PIXORDER_CBYCRY,
- .buf_type = CCDC_BUFTYPE_FLD_INTERLEAVED
-};
-
-static enum vpfe_hw_if_type ccdc_if_type;
-static void *__iomem ccdc_base_addr;
-static int ccdc_addr_size;
-
/* Raw Bayer formats */
static u32 ccdc_raw_bayer_pix_formats[] =
{V4L2_PIX_FMT_SBGGR8, V4L2_PIX_FMT_SBGGR16};
@@ -118,18 +129,12 @@ static u32 ccdc_raw_yuv_pix_formats[] =
/* register access routines */
static inline u32 regr(u32 offset)
{
- return __raw_readl(ccdc_base_addr + offset);
+ return __raw_readl(ccdc_cfg.base_addr + offset);
}
static inline void regw(u32 val, u32 offset)
{
- __raw_writel(val, ccdc_base_addr + offset);
-}
-
-static void ccdc_set_ccdc_base(void *addr, int size)
-{
- ccdc_base_addr = addr;
- ccdc_addr_size = size;
+ __raw_writel(val, ccdc_cfg.base_addr + offset);
}
static void ccdc_enable(int en)
@@ -153,12 +158,12 @@ static void ccdc_enable_output_to_sdram(int en)
static void ccdc_config_gain_offset(void)
{
/* configure gain */
- regw(ccdc_hw_params_raw.gain.r_ye, RYEGAIN);
- regw(ccdc_hw_params_raw.gain.gr_cy, GRCYGAIN);
- regw(ccdc_hw_params_raw.gain.gb_g, GBGGAIN);
- regw(ccdc_hw_params_raw.gain.b_mg, BMGGAIN);
+ regw(ccdc_cfg.bayer.gain.r_ye, RYEGAIN);
+ regw(ccdc_cfg.bayer.gain.gr_cy, GRCYGAIN);
+ regw(ccdc_cfg.bayer.gain.gb_g, GBGGAIN);
+ regw(ccdc_cfg.bayer.gain.b_mg, BMGGAIN);
/* configure offset */
- regw(ccdc_hw_params_raw.ccdc_offset, OFFSET);
+ regw(ccdc_cfg.bayer.ccdc_offset, OFFSET);
}
/*
@@ -169,7 +174,7 @@ static int ccdc_restore_defaults(void)
{
int i;
- dev_dbg(dev, "\nstarting ccdc_restore_defaults...");
+ dev_dbg(ccdc_cfg.dev, "\nstarting ccdc_restore_defaults...");
/* set all registers to zero */
for (i = 0; i <= CCDC_REG_LAST; i += 4)
regw(0, i);
@@ -180,30 +185,29 @@ static int ccdc_restore_defaults(void)
regw(CULH_DEFAULT, CULH);
regw(CULV_DEFAULT, CULV);
/* Set default Gain and Offset */
- ccdc_hw_params_raw.gain.r_ye = GAIN_DEFAULT;
- ccdc_hw_params_raw.gain.gb_g = GAIN_DEFAULT;
- ccdc_hw_params_raw.gain.gr_cy = GAIN_DEFAULT;
- ccdc_hw_params_raw.gain.b_mg = GAIN_DEFAULT;
+ ccdc_cfg.bayer.gain.r_ye = GAIN_DEFAULT;
+ ccdc_cfg.bayer.gain.gb_g = GAIN_DEFAULT;
+ ccdc_cfg.bayer.gain.gr_cy = GAIN_DEFAULT;
+ ccdc_cfg.bayer.gain.b_mg = GAIN_DEFAULT;
ccdc_config_gain_offset();
regw(OUTCLIP_DEFAULT, OUTCLIP);
regw(LSCCFG2_DEFAULT, LSCCFG2);
/* select ccdc input */
if (vpss_select_ccdc_source(VPSS_CCDCIN)) {
- dev_dbg(dev, "\ncouldn't select ccdc input source");
+ dev_dbg(ccdc_cfg.dev, "\ncouldn't select ccdc input source");
return -EFAULT;
}
/* select ccdc clock */
if (vpss_enable_clock(VPSS_CCDC_CLOCK, 1) < 0) {
- dev_dbg(dev, "\ncouldn't enable ccdc clock");
+ dev_dbg(ccdc_cfg.dev, "\ncouldn't enable ccdc clock");
return -EFAULT;
}
- dev_dbg(dev, "\nEnd of ccdc_restore_defaults...");
+ dev_dbg(ccdc_cfg.dev, "\nEnd of ccdc_restore_defaults...");
return 0;
}
static int ccdc_open(struct device *device)
{
- dev = device;
return ccdc_restore_defaults();
}
@@ -226,7 +230,7 @@ static void ccdc_setwin(struct v4l2_rect *image_win,
int vert_start, vert_nr_lines;
int mid_img = 0;
- dev_dbg(dev, "\nStarting ccdc_setwin...");
+ dev_dbg(ccdc_cfg.dev, "\nStarting ccdc_setwin...");
/*
* ppc - per pixel count. indicates how many pixels per cell
@@ -260,45 +264,46 @@ static void ccdc_setwin(struct v4l2_rect *image_win,
regw(vert_start & CCDC_START_VER_ONE_MASK, SLV0);
regw(vert_start & CCDC_START_VER_TWO_MASK, SLV1);
regw(vert_nr_lines & CCDC_NUM_LINES_VER, NLV);
- dev_dbg(dev, "\nEnd of ccdc_setwin...");
+ dev_dbg(ccdc_cfg.dev, "\nEnd of ccdc_setwin...");
}
static int validate_ccdc_param(struct ccdc_config_params_raw *ccdcparam)
{
if (ccdcparam->datasft < CCDC_DATA_NO_SHIFT ||
ccdcparam->datasft > CCDC_DATA_SHIFT_6BIT) {
- dev_dbg(dev, "Invalid value of data shift\n");
+ dev_dbg(ccdc_cfg.dev, "Invalid value of data shift\n");
return -EINVAL;
}
if (ccdcparam->mfilt1 < CCDC_NO_MEDIAN_FILTER1 ||
ccdcparam->mfilt1 > CCDC_MEDIAN_FILTER1) {
- dev_dbg(dev, "Invalid value of median filter1\n");
+ dev_dbg(ccdc_cfg.dev, "Invalid value of median filter1\n");
return -EINVAL;
}
if (ccdcparam->mfilt2 < CCDC_NO_MEDIAN_FILTER2 ||
ccdcparam->mfilt2 > CCDC_MEDIAN_FILTER2) {
- dev_dbg(dev, "Invalid value of median filter2\n");
+ dev_dbg(ccdc_cfg.dev, "Invalid value of median filter2\n");
return -EINVAL;
}
if ((ccdcparam->med_filt_thres < 0) ||
(ccdcparam->med_filt_thres > CCDC_MED_FILT_THRESH)) {
- dev_dbg(dev, "Invalid value of median filter threshold\n");
+ dev_dbg(ccdc_cfg.dev,
+ "Invalid value of median filter thresold\n");
return -EINVAL;
}
if (ccdcparam->data_sz < CCDC_DATA_16BITS ||
ccdcparam->data_sz > CCDC_DATA_8BITS) {
- dev_dbg(dev, "Invalid value of data size\n");
+ dev_dbg(ccdc_cfg.dev, "Invalid value of data size\n");
return -EINVAL;
}
if (ccdcparam->alaw.enable) {
if (ccdcparam->alaw.gama_wd < CCDC_GAMMA_BITS_13_4 ||
ccdcparam->alaw.gama_wd > CCDC_GAMMA_BITS_09_0) {
- dev_dbg(dev, "Invalid value of ALAW\n");
+ dev_dbg(ccdc_cfg.dev, "Invalid value of ALAW\n");
return -EINVAL;
}
}
@@ -306,12 +311,14 @@ static int validate_ccdc_param(struct ccdc_config_params_raw *ccdcparam)
if (ccdcparam->blk_clamp.b_clamp_enable) {
if (ccdcparam->blk_clamp.sample_pixel < CCDC_SAMPLE_1PIXELS ||
ccdcparam->blk_clamp.sample_pixel > CCDC_SAMPLE_16PIXELS) {
- dev_dbg(dev, "Invalid value of sample pixel\n");
+ dev_dbg(ccdc_cfg.dev,
+ "Invalid value of sample pixel\n");
return -EINVAL;
}
if (ccdcparam->blk_clamp.sample_ln < CCDC_SAMPLE_1LINES ||
ccdcparam->blk_clamp.sample_ln > CCDC_SAMPLE_16LINES) {
- dev_dbg(dev, "Invalid value of sample lines\n");
+ dev_dbg(ccdc_cfg.dev,
+ "Invalid value of sample lines\n");
return -EINVAL;
}
}
@@ -325,18 +332,18 @@ static int ccdc_set_params(void __user *params)
int x;
/* only raw module parameters can be set through the IOCTL */
- if (ccdc_if_type != VPFE_RAW_BAYER)
+ if (ccdc_cfg.if_type != VPFE_RAW_BAYER)
return -EINVAL;
x = copy_from_user(&ccdc_raw_params, params, sizeof(ccdc_raw_params));
if (x) {
- dev_dbg(dev, "ccdc_set_params: error in copying ccdc"
+ dev_dbg(ccdc_cfg.dev, "ccdc_set_params: error in copying ccdc"
"params, %d\n", x);
return -EFAULT;
}
if (!validate_ccdc_param(&ccdc_raw_params)) {
- memcpy(&ccdc_hw_params_raw.config_params,
+ memcpy(&ccdc_cfg.bayer.config_params,
&ccdc_raw_params,
sizeof(ccdc_raw_params));
return 0;
@@ -347,11 +354,11 @@ static int ccdc_set_params(void __user *params)
/* This function will configure CCDC for YCbCr video capture */
static void ccdc_config_ycbcr(void)
{
- struct ccdc_params_ycbcr *params = &ccdc_hw_params_ycbcr;
+ struct ccdc_params_ycbcr *params = &ccdc_cfg.ycbcr;
u32 temp;
/* first set the CCDC power on defaults values in all registers */
- dev_dbg(dev, "\nStarting ccdc_config_ycbcr...");
+ dev_dbg(ccdc_cfg.dev, "\nStarting ccdc_config_ycbcr...");
ccdc_restore_defaults();
/* configure pixel format & video frame format */
@@ -403,7 +410,7 @@ static void ccdc_config_ycbcr(void)
regw(CCDC_SDOFST_FIELD_INTERLEAVED, SDOFST);
}
- dev_dbg(dev, "\nEnd of ccdc_config_ycbcr...\n");
+ dev_dbg(ccdc_cfg.dev, "\nEnd of ccdc_config_ycbcr...\n");
}
/*
@@ -483,7 +490,7 @@ int ccdc_write_dfc_entry(int index, struct ccdc_vertical_dft *dfc)
*/
if (count) {
- dev_err(dev, "defect table write timeout !!!\n");
+ dev_err(ccdc_cfg.dev, "defect table write timeout !!!\n");
return -1;
}
return 0;
@@ -605,12 +612,12 @@ static void ccdc_config_color_patterns(struct ccdc_col_pat *pat0,
/* This function will configure CCDC for Raw mode image capture */
static int ccdc_config_raw(void)
{
- struct ccdc_params_raw *params = &ccdc_hw_params_raw;
+ struct ccdc_params_raw *params = &ccdc_cfg.bayer;
struct ccdc_config_params_raw *config_params =
- &ccdc_hw_params_raw.config_params;
+ &ccdc_cfg.bayer.config_params;
unsigned int val;
- dev_dbg(dev, "\nStarting ccdc_config_raw...");
+ dev_dbg(ccdc_cfg.dev, "\nStarting ccdc_config_raw...");
/* restore power on defaults to register */
ccdc_restore_defaults();
@@ -659,7 +666,7 @@ static int ccdc_config_raw(void)
val |= (config_params->datasft & CCDC_DATASFT_MASK) <<
CCDC_DATASFT_SHIFT;
regw(val , MODESET);
- dev_dbg(dev, "\nWriting 0x%x to MODESET...\n", val);
+ dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to MODESET...\n", val);
/* Configure the Median Filter threshold */
regw((config_params->med_filt_thres) & CCDC_MED_FILT_THRESH, MEDFILT);
@@ -681,7 +688,7 @@ static int ccdc_config_raw(void)
(config_params->mfilt2 << CCDC_MFILT2_SHIFT));
regw(val, GAMMAWD);
- dev_dbg(dev, "\nWriting 0x%x to GAMMAWD...\n", val);
+ dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to GAMMAWD...\n", val);
/* configure video window */
ccdc_setwin(¶ms->win, params->frm_fmt, 1);
@@ -706,7 +713,7 @@ static int ccdc_config_raw(void)
/* Configure the Gain & offset control */
ccdc_config_gain_offset();
- dev_dbg(dev, "\nWriting %x to COLPTN...\n", val);
+ dev_dbg(ccdc_cfg.dev, "\nWriting %x to COLPTN...\n", val);
/* Configure DATAOFST register */
val = (config_params->data_offset.horz_offset & CCDC_DATAOFST_MASK) <<
@@ -726,7 +733,7 @@ static int ccdc_config_raw(void)
CCDC_HSIZE_VAL_MASK;
/* adjust to multiple of 32 */
- dev_dbg(dev, "\nWriting 0x%x to HSIZE...\n",
+ dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to HSIZE...\n",
(((params->win.width) + 31) >> 5) &
CCDC_HSIZE_VAL_MASK);
} else {
@@ -734,7 +741,7 @@ static int ccdc_config_raw(void)
val |= (((params->win.width * 2) + 31) >> 5) &
CCDC_HSIZE_VAL_MASK;
- dev_dbg(dev, "\nWriting 0x%x to HSIZE...\n",
+ dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to HSIZE...\n",
(((params->win.width * 2) + 31) >> 5) &
CCDC_HSIZE_VAL_MASK);
}
@@ -745,34 +752,34 @@ static int ccdc_config_raw(void)
if (params->image_invert_enable) {
/* For interlace inverse mode */
regw(CCDC_SDOFST_INTERLACE_INVERSE, SDOFST);
- dev_dbg(dev, "\nWriting %x to SDOFST...\n",
+ dev_dbg(ccdc_cfg.dev, "\nWriting %x to SDOFST...\n",
CCDC_SDOFST_INTERLACE_INVERSE);
} else {
/* For interlace non inverse mode */
regw(CCDC_SDOFST_INTERLACE_NORMAL, SDOFST);
- dev_dbg(dev, "\nWriting %x to SDOFST...\n",
+ dev_dbg(ccdc_cfg.dev, "\nWriting %x to SDOFST...\n",
CCDC_SDOFST_INTERLACE_NORMAL);
}
} else if (params->frm_fmt == CCDC_FRMFMT_PROGRESSIVE) {
if (params->image_invert_enable) {
/* For progessive inverse mode */
regw(CCDC_SDOFST_PROGRESSIVE_INVERSE, SDOFST);
- dev_dbg(dev, "\nWriting %x to SDOFST...\n",
+ dev_dbg(ccdc_cfg.dev, "\nWriting %x to SDOFST...\n",
CCDC_SDOFST_PROGRESSIVE_INVERSE);
} else {
/* For progessive non inverse mode */
regw(CCDC_SDOFST_PROGRESSIVE_NORMAL, SDOFST);
- dev_dbg(dev, "\nWriting %x to SDOFST...\n",
+ dev_dbg(ccdc_cfg.dev, "\nWriting %x to SDOFST...\n",
CCDC_SDOFST_PROGRESSIVE_NORMAL);
}
}
- dev_dbg(dev, "\nend of ccdc_config_raw...");
+ dev_dbg(ccdc_cfg.dev, "\nend of ccdc_config_raw...");
return 0;
}
static int ccdc_configure(void)
{
- if (ccdc_if_type == VPFE_RAW_BAYER)
+ if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
return ccdc_config_raw();
else
ccdc_config_ycbcr();
@@ -781,23 +788,23 @@ static int ccdc_configure(void)
static int ccdc_set_buftype(enum ccdc_buftype buf_type)
{
- if (ccdc_if_type == VPFE_RAW_BAYER)
- ccdc_hw_params_raw.buf_type = buf_type;
+ if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
+ ccdc_cfg.bayer.buf_type = buf_type;
else
- ccdc_hw_params_ycbcr.buf_type = buf_type;
+ ccdc_cfg.ycbcr.buf_type = buf_type;
return 0;
}
static enum ccdc_buftype ccdc_get_buftype(void)
{
- if (ccdc_if_type == VPFE_RAW_BAYER)
- return ccdc_hw_params_raw.buf_type;
- return ccdc_hw_params_ycbcr.buf_type;
+ if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
+ return ccdc_cfg.bayer.buf_type;
+ return ccdc_cfg.ycbcr.buf_type;
}
static int ccdc_enum_pix(u32 *pix, int i)
{
int ret = -EINVAL;
- if (ccdc_if_type == VPFE_RAW_BAYER) {
+ if (ccdc_cfg.if_type == VPFE_RAW_BAYER) {
if (i < ARRAY_SIZE(ccdc_raw_bayer_pix_formats)) {
*pix = ccdc_raw_bayer_pix_formats[i];
ret = 0;
@@ -813,20 +820,19 @@ static int ccdc_enum_pix(u32 *pix, int i)
static int ccdc_set_pixel_format(u32 pixfmt)
{
- struct ccdc_a_law *alaw =
- &ccdc_hw_params_raw.config_params.alaw;
+ struct ccdc_a_law *alaw = &ccdc_cfg.bayer.config_params.alaw;
- if (ccdc_if_type == VPFE_RAW_BAYER) {
- ccdc_hw_params_raw.pix_fmt = CCDC_PIXFMT_RAW;
+ if (ccdc_cfg.if_type == VPFE_RAW_BAYER) {
+ ccdc_cfg.bayer.pix_fmt = CCDC_PIXFMT_RAW;
if (pixfmt == V4L2_PIX_FMT_SBGGR8)
alaw->enable = 1;
else if (pixfmt != V4L2_PIX_FMT_SBGGR16)
return -EINVAL;
} else {
if (pixfmt == V4L2_PIX_FMT_YUYV)
- ccdc_hw_params_ycbcr.pix_order = CCDC_PIXORDER_YCBYCR;
+ ccdc_cfg.ycbcr.pix_order = CCDC_PIXORDER_YCBYCR;
else if (pixfmt == V4L2_PIX_FMT_UYVY)
- ccdc_hw_params_ycbcr.pix_order = CCDC_PIXORDER_CBYCRY;
+ ccdc_cfg.ycbcr.pix_order = CCDC_PIXORDER_CBYCRY;
else
return -EINVAL;
}
@@ -834,17 +840,16 @@ static int ccdc_set_pixel_format(u32 pixfmt)
}
static u32 ccdc_get_pixel_format(void)
{
- struct ccdc_a_law *alaw =
- &ccdc_hw_params_raw.config_params.alaw;
+ struct ccdc_a_law *alaw = &ccdc_cfg.bayer.config_params.alaw;
u32 pixfmt;
- if (ccdc_if_type == VPFE_RAW_BAYER)
+ if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
if (alaw->enable)
pixfmt = V4L2_PIX_FMT_SBGGR8;
else
pixfmt = V4L2_PIX_FMT_SBGGR16;
else {
- if (ccdc_hw_params_ycbcr.pix_order == CCDC_PIXORDER_YCBYCR)
+ if (ccdc_cfg.ycbcr.pix_order == CCDC_PIXORDER_YCBYCR)
pixfmt = V4L2_PIX_FMT_YUYV;
else
pixfmt = V4L2_PIX_FMT_UYVY;
@@ -853,53 +858,53 @@ static u32 ccdc_get_pixel_format(void)
}
static int ccdc_set_image_window(struct v4l2_rect *win)
{
- if (ccdc_if_type == VPFE_RAW_BAYER)
- ccdc_hw_params_raw.win = *win;
+ if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
+ ccdc_cfg.bayer.win = *win;
else
- ccdc_hw_params_ycbcr.win = *win;
+ ccdc_cfg.ycbcr.win = *win;
return 0;
}
static void ccdc_get_image_window(struct v4l2_rect *win)
{
- if (ccdc_if_type == VPFE_RAW_BAYER)
- *win = ccdc_hw_params_raw.win;
+ if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
+ *win = ccdc_cfg.bayer.win;
else
- *win = ccdc_hw_params_ycbcr.win;
+ *win = ccdc_cfg.ycbcr.win;
}
static unsigned int ccdc_get_line_length(void)
{
struct ccdc_config_params_raw *config_params =
- &ccdc_hw_params_raw.config_params;
+ &ccdc_cfg.bayer.config_params;
unsigned int len;
- if (ccdc_if_type == VPFE_RAW_BAYER) {
+ if (ccdc_cfg.if_type == VPFE_RAW_BAYER) {
if ((config_params->alaw.enable) ||
(config_params->data_sz == CCDC_DATA_8BITS))
- len = ccdc_hw_params_raw.win.width;
+ len = ccdc_cfg.bayer.win.width;
else
- len = ccdc_hw_params_raw.win.width * 2;
+ len = ccdc_cfg.bayer.win.width * 2;
} else
- len = ccdc_hw_params_ycbcr.win.width * 2;
+ len = ccdc_cfg.ycbcr.win.width * 2;
return ALIGN(len, 32);
}
static int ccdc_set_frame_format(enum ccdc_frmfmt frm_fmt)
{
- if (ccdc_if_type == VPFE_RAW_BAYER)
- ccdc_hw_params_raw.frm_fmt = frm_fmt;
+ if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
+ ccdc_cfg.bayer.frm_fmt = frm_fmt;
else
- ccdc_hw_params_ycbcr.frm_fmt = frm_fmt;
+ ccdc_cfg.ycbcr.frm_fmt = frm_fmt;
return 0;
}
static enum ccdc_frmfmt ccdc_get_frame_format(void)
{
- if (ccdc_if_type == VPFE_RAW_BAYER)
- return ccdc_hw_params_raw.frm_fmt;
+ if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
+ return ccdc_cfg.bayer.frm_fmt;
else
- return ccdc_hw_params_ycbcr.frm_fmt;
+ return ccdc_cfg.ycbcr.frm_fmt;
}
static int ccdc_getfid(void)
@@ -916,14 +921,14 @@ static inline void ccdc_setfbaddr(unsigned long addr)
static int ccdc_set_hw_if_params(struct vpfe_hw_if_param *params)
{
- ccdc_if_type = params->if_type;
+ ccdc_cfg.if_type = params->if_type;
switch (params->if_type) {
case VPFE_BT656:
case VPFE_YCBCR_SYNC_16:
case VPFE_YCBCR_SYNC_8:
- ccdc_hw_params_ycbcr.vd_pol = params->vdpol;
- ccdc_hw_params_ycbcr.hd_pol = params->hdpol;
+ ccdc_cfg.ycbcr.vd_pol = params->vdpol;
+ ccdc_cfg.ycbcr.hd_pol = params->hdpol;
break;
default:
/* TODO add support for raw bayer here */
@@ -938,7 +943,6 @@ static struct ccdc_hw_device ccdc_hw_dev = {
.hw_ops = {
.open = ccdc_open,
.close = ccdc_close,
- .set_ccdc_base = ccdc_set_ccdc_base,
.enable = ccdc_enable,
.enable_out_to_sdram = ccdc_enable_output_to_sdram,
.set_hw_if_params = ccdc_set_hw_if_params,
@@ -959,19 +963,118 @@ static struct ccdc_hw_device ccdc_hw_dev = {
},
};
-static int __init dm355_ccdc_init(void)
+static int __init dm355_ccdc_probe(struct platform_device *pdev)
{
- printk(KERN_NOTICE "dm355_ccdc_init\n");
- if (vpfe_register_ccdc_device(&ccdc_hw_dev) < 0)
- return -1;
- printk(KERN_NOTICE "%s is registered with vpfe.\n",
- ccdc_hw_dev.name);
+ void (*setup_pinmux)(void);
+ struct resource *res;
+ int status = 0;
+
+ /*
+ * first try to register with vpfe. If not correct platform, then we
+ * don't have to iomap
+ */
+ status = vpfe_register_ccdc_device(&ccdc_hw_dev);
+ if (status < 0)
+ return status;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res) {
+ status = -ENODEV;
+ goto fail_nores;
+ }
+
+ res = request_mem_region(res->start, resource_size(res), res->name);
+ if (!res) {
+ status = -EBUSY;
+ goto fail_nores;
+ }
+
+ ccdc_cfg.base_addr = ioremap_nocache(res->start, resource_size(res));
+ if (!ccdc_cfg.base_addr) {
+ status = -ENOMEM;
+ goto fail_nomem;
+ }
+
+ /* Get and enable Master clock */
+ ccdc_cfg.mclk = clk_get(&pdev->dev, "master");
+ if (NULL == ccdc_cfg.mclk) {
+ status = -ENODEV;
+ goto fail_nomap;
+ }
+ if (clk_enable(ccdc_cfg.mclk)) {
+ status = -ENODEV;
+ goto fail_mclk;
+ }
+
+ /* Get and enable Slave clock */
+ ccdc_cfg.sclk = clk_get(&pdev->dev, "slave");
+ if (NULL == ccdc_cfg.sclk) {
+ status = -ENODEV;
+ goto fail_mclk;
+ }
+ if (clk_enable(ccdc_cfg.sclk)) {
+ status = -ENODEV;
+ goto fail_sclk;
+ }
+
+ /* Platform data holds setup_pinmux function ptr */
+ if (NULL == pdev->dev.platform_data) {
+ status = -ENODEV;
+ goto fail_sclk;
+ }
+ setup_pinmux = pdev->dev.platform_data;
+ /*
+ * setup Mux configuration for ccdc which may be different for
+ * different SoCs using this CCDC
+ */
+ setup_pinmux();
+ ccdc_cfg.dev = &pdev->dev;
+ printk(KERN_NOTICE "%s is registered with vpfe.\n", ccdc_hw_dev.name);
return 0;
+fail_sclk:
+ clk_put(ccdc_cfg.sclk);
+fail_mclk:
+ clk_put(ccdc_cfg.mclk);
+fail_nomap:
+ iounmap(ccdc_cfg.base_addr);
+fail_nomem:
+ release_mem_region(res->start, resource_size(res));
+fail_nores:
+ vpfe_unregister_ccdc_device(&ccdc_hw_dev);
+ return status;
}
-static void __exit dm355_ccdc_exit(void)
+static int dm355_ccdc_remove(struct platform_device *pdev)
{
+ struct resource *res;
+
+ clk_put(ccdc_cfg.mclk);
+ clk_put(ccdc_cfg.sclk);
+ iounmap(ccdc_cfg.base_addr);
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (res)
+ release_mem_region(res->start, resource_size(res));
vpfe_unregister_ccdc_device(&ccdc_hw_dev);
+ return 0;
+}
+
+static struct platform_driver dm355_ccdc_driver = {
+ .driver = {
+ .name = "dm355_ccdc",
+ .owner = THIS_MODULE,
+ },
+ .remove = __devexit_p(dm355_ccdc_remove),
+ .probe = dm355_ccdc_probe,
+};
+
+static int __init dm355_ccdc_init(void)
+{
+ return platform_driver_register(&dm355_ccdc_driver);
+}
+
+static void __exit dm355_ccdc_exit(void)
+{
+ platform_driver_unregister(&dm355_ccdc_driver);
}
module_init(dm355_ccdc_init);
--
1.6.0.4
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH - v4 3/4] V4L-vpfe-capture-converting-dm644x-driver to a platform driver
2010-01-11 23:36 ` [PATCH - v4 2/4] V4L-vpfe-capture-converting dm355 ccdc driver to a platform driver m-karicheri2
@ 2010-01-11 23:36 ` m-karicheri2
2010-01-11 23:36 ` [PATCH - v4 1/4] V4L-vpfe_capture-remove-clock and platform code m-karicheri2
2010-01-12 0:22 ` [PATCH - v4 2/4] V4L-vpfe-capture-converting dm355 ccdc driver to a platform driver Kevin Hilman
1 sibling, 1 reply; 11+ messages in thread
From: m-karicheri2 @ 2010-01-11 23:36 UTC (permalink / raw)
To: linux-media, khilman, mchehab
Cc: hverkuil, davinci-linux-open-source, Muralidharan Karicheri
From: Muralidharan Karicheri <m-karicheri2@ti.com>
Updated based on Kevin's comments on clock configuration.
The ccdc now uses a generic name for clocks. master and slave. On individual platforms
these clocks will inherit from the platform specific clock. This will allow re-use of
the driver for the same IP across different SoCs.
Following are the changes done:-
1) clocks are configured using generic clock names
2) converting the driver to a platform driver
3) cleanup - consolidate all static variables inside a structure, ccdc_cfg
Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com>
Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com>
Reviewed-by: Hans Verkuil <hverkuil@xs4all.nl>
Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
Signed-off-by: Muralidharan Karicheri <m-karicheri2@ti.com>
---
Rebased to latest linux-next tree
Applies to linux-next tree of v4l-dvb
drivers/media/video/davinci/dm644x_ccdc.c | 360 ++++++++++++++++++-----------
1 files changed, 224 insertions(+), 136 deletions(-)
diff --git a/drivers/media/video/davinci/dm644x_ccdc.c b/drivers/media/video/davinci/dm644x_ccdc.c
index d5fa193..7e35269 100644
--- a/drivers/media/video/davinci/dm644x_ccdc.c
+++ b/drivers/media/video/davinci/dm644x_ccdc.c
@@ -37,8 +37,11 @@
#include <linux/platform_device.h>
#include <linux/uaccess.h>
#include <linux/videodev2.h>
+#include <linux/clk.h>
+
#include <media/davinci/dm644x_ccdc.h>
#include <media/davinci/vpss.h>
+
#include "dm644x_ccdc_regs.h"
#include "ccdc_hw_device.h"
@@ -46,32 +49,44 @@ MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("CCDC Driver for DM6446");
MODULE_AUTHOR("Texas Instruments");
-static struct device *dev;
-
-/* Object for CCDC raw mode */
-static struct ccdc_params_raw ccdc_hw_params_raw = {
- .pix_fmt = CCDC_PIXFMT_RAW,
- .frm_fmt = CCDC_FRMFMT_PROGRESSIVE,
- .win = CCDC_WIN_VGA,
- .fid_pol = VPFE_PINPOL_POSITIVE,
- .vd_pol = VPFE_PINPOL_POSITIVE,
- .hd_pol = VPFE_PINPOL_POSITIVE,
- .config_params = {
- .data_sz = CCDC_DATA_10BITS,
+static struct ccdc_oper_config {
+ struct device *dev;
+ /* CCDC interface type */
+ enum vpfe_hw_if_type if_type;
+ /* Raw Bayer configuration */
+ struct ccdc_params_raw bayer;
+ /* YCbCr configuration */
+ struct ccdc_params_ycbcr ycbcr;
+ /* Master clock */
+ struct clk *mclk;
+ /* slave clock */
+ struct clk *sclk;
+ /* ccdc base address */
+ void __iomem *base_addr;
+} ccdc_cfg = {
+ /* Raw configurations */
+ .bayer = {
+ .pix_fmt = CCDC_PIXFMT_RAW,
+ .frm_fmt = CCDC_FRMFMT_PROGRESSIVE,
+ .win = CCDC_WIN_VGA,
+ .fid_pol = VPFE_PINPOL_POSITIVE,
+ .vd_pol = VPFE_PINPOL_POSITIVE,
+ .hd_pol = VPFE_PINPOL_POSITIVE,
+ .config_params = {
+ .data_sz = CCDC_DATA_10BITS,
+ },
+ },
+ .ycbcr = {
+ .pix_fmt = CCDC_PIXFMT_YCBCR_8BIT,
+ .frm_fmt = CCDC_FRMFMT_INTERLACED,
+ .win = CCDC_WIN_PAL,
+ .fid_pol = VPFE_PINPOL_POSITIVE,
+ .vd_pol = VPFE_PINPOL_POSITIVE,
+ .hd_pol = VPFE_PINPOL_POSITIVE,
+ .bt656_enable = 1,
+ .pix_order = CCDC_PIXORDER_CBYCRY,
+ .buf_type = CCDC_BUFTYPE_FLD_INTERLEAVED
},
-};
-
-/* Object for CCDC ycbcr mode */
-static struct ccdc_params_ycbcr ccdc_hw_params_ycbcr = {
- .pix_fmt = CCDC_PIXFMT_YCBCR_8BIT,
- .frm_fmt = CCDC_FRMFMT_INTERLACED,
- .win = CCDC_WIN_PAL,
- .fid_pol = VPFE_PINPOL_POSITIVE,
- .vd_pol = VPFE_PINPOL_POSITIVE,
- .hd_pol = VPFE_PINPOL_POSITIVE,
- .bt656_enable = 1,
- .pix_order = CCDC_PIXORDER_CBYCRY,
- .buf_type = CCDC_BUFTYPE_FLD_INTERLEAVED
};
#define CCDC_MAX_RAW_YUV_FORMATS 2
@@ -84,25 +99,15 @@ static u32 ccdc_raw_bayer_pix_formats[] =
static u32 ccdc_raw_yuv_pix_formats[] =
{V4L2_PIX_FMT_UYVY, V4L2_PIX_FMT_YUYV};
-static void *__iomem ccdc_base_addr;
-static int ccdc_addr_size;
-static enum vpfe_hw_if_type ccdc_if_type;
-
/* register access routines */
static inline u32 regr(u32 offset)
{
- return __raw_readl(ccdc_base_addr + offset);
+ return __raw_readl(ccdc_cfg.base_addr + offset);
}
static inline void regw(u32 val, u32 offset)
{
- __raw_writel(val, ccdc_base_addr + offset);
-}
-
-static void ccdc_set_ccdc_base(void *addr, int size)
-{
- ccdc_base_addr = addr;
- ccdc_addr_size = size;
+ __raw_writel(val, ccdc_cfg.base_addr + offset);
}
static void ccdc_enable(int flag)
@@ -132,7 +137,7 @@ void ccdc_setwin(struct v4l2_rect *image_win,
int vert_start, vert_nr_lines;
int val = 0, mid_img = 0;
- dev_dbg(dev, "\nStarting ccdc_setwin...");
+ dev_dbg(ccdc_cfg.dev, "\nStarting ccdc_setwin...");
/*
* ppc - per pixel count. indicates how many pixels per cell
* output to SDRAM. example, for ycbcr, it is one y and one c, so 2.
@@ -171,7 +176,7 @@ void ccdc_setwin(struct v4l2_rect *image_win,
regw((vert_start << CCDC_VERT_START_SLV0_SHIFT) | vert_start,
CCDC_VERT_START);
regw(vert_nr_lines, CCDC_VERT_LINES);
- dev_dbg(dev, "\nEnd of ccdc_setwin...");
+ dev_dbg(ccdc_cfg.dev, "\nEnd of ccdc_setwin...");
}
static void ccdc_readregs(void)
@@ -179,39 +184,39 @@ static void ccdc_readregs(void)
unsigned int val = 0;
val = regr(CCDC_ALAW);
- dev_notice(dev, "\nReading 0x%x to ALAW...\n", val);
+ dev_notice(ccdc_cfg.dev, "\nReading 0x%x to ALAW...\n", val);
val = regr(CCDC_CLAMP);
- dev_notice(dev, "\nReading 0x%x to CLAMP...\n", val);
+ dev_notice(ccdc_cfg.dev, "\nReading 0x%x to CLAMP...\n", val);
val = regr(CCDC_DCSUB);
- dev_notice(dev, "\nReading 0x%x to DCSUB...\n", val);
+ dev_notice(ccdc_cfg.dev, "\nReading 0x%x to DCSUB...\n", val);
val = regr(CCDC_BLKCMP);
- dev_notice(dev, "\nReading 0x%x to BLKCMP...\n", val);
+ dev_notice(ccdc_cfg.dev, "\nReading 0x%x to BLKCMP...\n", val);
val = regr(CCDC_FPC_ADDR);
- dev_notice(dev, "\nReading 0x%x to FPC_ADDR...\n", val);
+ dev_notice(ccdc_cfg.dev, "\nReading 0x%x to FPC_ADDR...\n", val);
val = regr(CCDC_FPC);
- dev_notice(dev, "\nReading 0x%x to FPC...\n", val);
+ dev_notice(ccdc_cfg.dev, "\nReading 0x%x to FPC...\n", val);
val = regr(CCDC_FMTCFG);
- dev_notice(dev, "\nReading 0x%x to FMTCFG...\n", val);
+ dev_notice(ccdc_cfg.dev, "\nReading 0x%x to FMTCFG...\n", val);
val = regr(CCDC_COLPTN);
- dev_notice(dev, "\nReading 0x%x to COLPTN...\n", val);
+ dev_notice(ccdc_cfg.dev, "\nReading 0x%x to COLPTN...\n", val);
val = regr(CCDC_FMT_HORZ);
- dev_notice(dev, "\nReading 0x%x to FMT_HORZ...\n", val);
+ dev_notice(ccdc_cfg.dev, "\nReading 0x%x to FMT_HORZ...\n", val);
val = regr(CCDC_FMT_VERT);
- dev_notice(dev, "\nReading 0x%x to FMT_VERT...\n", val);
+ dev_notice(ccdc_cfg.dev, "\nReading 0x%x to FMT_VERT...\n", val);
val = regr(CCDC_HSIZE_OFF);
- dev_notice(dev, "\nReading 0x%x to HSIZE_OFF...\n", val);
+ dev_notice(ccdc_cfg.dev, "\nReading 0x%x to HSIZE_OFF...\n", val);
val = regr(CCDC_SDOFST);
- dev_notice(dev, "\nReading 0x%x to SDOFST...\n", val);
+ dev_notice(ccdc_cfg.dev, "\nReading 0x%x to SDOFST...\n", val);
val = regr(CCDC_VP_OUT);
- dev_notice(dev, "\nReading 0x%x to VP_OUT...\n", val);
+ dev_notice(ccdc_cfg.dev, "\nReading 0x%x to VP_OUT...\n", val);
val = regr(CCDC_SYN_MODE);
- dev_notice(dev, "\nReading 0x%x to SYN_MODE...\n", val);
+ dev_notice(ccdc_cfg.dev, "\nReading 0x%x to SYN_MODE...\n", val);
val = regr(CCDC_HORZ_INFO);
- dev_notice(dev, "\nReading 0x%x to HORZ_INFO...\n", val);
+ dev_notice(ccdc_cfg.dev, "\nReading 0x%x to HORZ_INFO...\n", val);
val = regr(CCDC_VERT_START);
- dev_notice(dev, "\nReading 0x%x to VERT_START...\n", val);
+ dev_notice(ccdc_cfg.dev, "\nReading 0x%x to VERT_START...\n", val);
val = regr(CCDC_VERT_LINES);
- dev_notice(dev, "\nReading 0x%x to VERT_LINES...\n", val);
+ dev_notice(ccdc_cfg.dev, "\nReading 0x%x to VERT_LINES...\n", val);
}
static int validate_ccdc_param(struct ccdc_config_params_raw *ccdcparam)
@@ -220,7 +225,7 @@ static int validate_ccdc_param(struct ccdc_config_params_raw *ccdcparam)
if ((ccdcparam->alaw.gama_wd > CCDC_GAMMA_BITS_09_0) ||
(ccdcparam->alaw.gama_wd < CCDC_GAMMA_BITS_15_6) ||
(ccdcparam->alaw.gama_wd < ccdcparam->data_sz)) {
- dev_dbg(dev, "\nInvalid data line select");
+ dev_dbg(ccdc_cfg.dev, "\nInvalid data line select");
return -1;
}
}
@@ -230,7 +235,7 @@ static int validate_ccdc_param(struct ccdc_config_params_raw *ccdcparam)
static int ccdc_update_raw_params(struct ccdc_config_params_raw *raw_params)
{
struct ccdc_config_params_raw *config_params =
- &ccdc_hw_params_raw.config_params;
+ &ccdc_cfg.bayer.config_params;
unsigned int *fpc_virtaddr = NULL;
unsigned int *fpc_physaddr = NULL;
@@ -266,7 +271,7 @@ static int ccdc_update_raw_params(struct ccdc_config_params_raw *raw_params)
FP_NUM_BYTES));
if (fpc_virtaddr == NULL) {
- dev_dbg(dev,
+ dev_dbg(ccdc_cfg.dev,
"\nUnable to allocate memory for FPC");
return -EFAULT;
}
@@ -279,7 +284,7 @@ static int ccdc_update_raw_params(struct ccdc_config_params_raw *raw_params)
if (copy_from_user(fpc_virtaddr,
(void __user *)raw_params->fault_pxl.fpc_table_addr,
config_params->fault_pxl.fp_num * FP_NUM_BYTES)) {
- dev_dbg(dev, "\n copy_from_user failed");
+ dev_dbg(ccdc_cfg.dev, "\n copy_from_user failed");
return -EFAULT;
}
config_params->fault_pxl.fpc_table_addr = (unsigned int)fpc_physaddr;
@@ -289,7 +294,7 @@ static int ccdc_update_raw_params(struct ccdc_config_params_raw *raw_params)
static int ccdc_close(struct device *dev)
{
struct ccdc_config_params_raw *config_params =
- &ccdc_hw_params_raw.config_params;
+ &ccdc_cfg.bayer.config_params;
unsigned int *fpc_physaddr = NULL, *fpc_virtaddr = NULL;
fpc_physaddr = (unsigned int *)config_params->fault_pxl.fpc_table_addr;
@@ -323,9 +328,8 @@ static void ccdc_restore_defaults(void)
static int ccdc_open(struct device *device)
{
- dev = device;
ccdc_restore_defaults();
- if (ccdc_if_type == VPFE_RAW_BAYER)
+ if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
ccdc_enable_vport(1);
return 0;
}
@@ -341,12 +345,12 @@ static int ccdc_set_params(void __user *params)
struct ccdc_config_params_raw ccdc_raw_params;
int x;
- if (ccdc_if_type != VPFE_RAW_BAYER)
+ if (ccdc_cfg.if_type != VPFE_RAW_BAYER)
return -EINVAL;
x = copy_from_user(&ccdc_raw_params, params, sizeof(ccdc_raw_params));
if (x) {
- dev_dbg(dev, "ccdc_set_params: error in copying"
+ dev_dbg(ccdc_cfg.dev, "ccdc_set_params: error in copying"
"ccdc params, %d\n", x);
return -EFAULT;
}
@@ -364,10 +368,10 @@ static int ccdc_set_params(void __user *params)
*/
void ccdc_config_ycbcr(void)
{
- struct ccdc_params_ycbcr *params = &ccdc_hw_params_ycbcr;
+ struct ccdc_params_ycbcr *params = &ccdc_cfg.ycbcr;
u32 syn_mode;
- dev_dbg(dev, "\nStarting ccdc_config_ycbcr...");
+ dev_dbg(ccdc_cfg.dev, "\nStarting ccdc_config_ycbcr...");
/*
* first restore the CCDC registers to default values
* This is important since we assume default values to be set in
@@ -428,7 +432,7 @@ void ccdc_config_ycbcr(void)
regw(CCDC_SDOFST_FIELD_INTERLEAVED, CCDC_SDOFST);
ccdc_sbl_reset();
- dev_dbg(dev, "\nEnd of ccdc_config_ycbcr...\n");
+ dev_dbg(ccdc_cfg.dev, "\nEnd of ccdc_config_ycbcr...\n");
ccdc_readregs();
}
@@ -440,9 +444,9 @@ static void ccdc_config_black_clamp(struct ccdc_black_clamp *bclamp)
/* configure DCSub */
val = (bclamp->dc_sub) & CCDC_BLK_DC_SUB_MASK;
regw(val, CCDC_DCSUB);
- dev_dbg(dev, "\nWriting 0x%x to DCSUB...\n", val);
+ dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to DCSUB...\n", val);
regw(CCDC_CLAMP_DEFAULT_VAL, CCDC_CLAMP);
- dev_dbg(dev, "\nWriting 0x0000 to CLAMP...\n");
+ dev_dbg(ccdc_cfg.dev, "\nWriting 0x0000 to CLAMP...\n");
return;
}
/*
@@ -457,10 +461,10 @@ static void ccdc_config_black_clamp(struct ccdc_black_clamp *bclamp)
((bclamp->sample_pixel & CCDC_BLK_SAMPLE_LN_MASK) <<
CCDC_BLK_SAMPLE_LN_SHIFT) | CCDC_BLK_CLAMP_ENABLE);
regw(val, CCDC_CLAMP);
- dev_dbg(dev, "\nWriting 0x%x to CLAMP...\n", val);
+ dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to CLAMP...\n", val);
/* If Black clamping is enable then make dcsub 0 */
regw(CCDC_DCSUB_DEFAULT_VAL, CCDC_DCSUB);
- dev_dbg(dev, "\nWriting 0x00000000 to DCSUB...\n");
+ dev_dbg(ccdc_cfg.dev, "\nWriting 0x00000000 to DCSUB...\n");
}
static void ccdc_config_black_compense(struct ccdc_black_compensation *bcomp)
@@ -490,17 +494,17 @@ static void ccdc_config_fpc(struct ccdc_fault_pixel *fpc)
/* Configure Fault pixel if needed */
regw(fpc->fpc_table_addr, CCDC_FPC_ADDR);
- dev_dbg(dev, "\nWriting 0x%x to FPC_ADDR...\n",
+ dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to FPC_ADDR...\n",
(fpc->fpc_table_addr));
/* Write the FPC params with FPC disable */
val = fpc->fp_num & CCDC_FPC_FPC_NUM_MASK;
regw(val, CCDC_FPC);
- dev_dbg(dev, "\nWriting 0x%x to FPC...\n", val);
+ dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to FPC...\n", val);
/* read the FPC register */
val = regr(CCDC_FPC) | CCDC_FPC_ENABLE;
regw(val, CCDC_FPC);
- dev_dbg(dev, "\nWriting 0x%x to FPC...\n", val);
+ dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to FPC...\n", val);
}
/*
@@ -509,13 +513,13 @@ static void ccdc_config_fpc(struct ccdc_fault_pixel *fpc)
*/
void ccdc_config_raw(void)
{
- struct ccdc_params_raw *params = &ccdc_hw_params_raw;
+ struct ccdc_params_raw *params = &ccdc_cfg.bayer;
struct ccdc_config_params_raw *config_params =
- &ccdc_hw_params_raw.config_params;
+ &ccdc_cfg.bayer.config_params;
unsigned int syn_mode = 0;
unsigned int val;
- dev_dbg(dev, "\nStarting ccdc_config_raw...");
+ dev_dbg(ccdc_cfg.dev, "\nStarting ccdc_config_raw...");
/* Reset CCDC */
ccdc_restore_defaults();
@@ -545,7 +549,7 @@ void ccdc_config_raw(void)
val = ((config_params->alaw.gama_wd &
CCDC_ALAW_GAMA_WD_MASK) | CCDC_ALAW_ENABLE);
regw(val, CCDC_ALAW);
- dev_dbg(dev, "\nWriting 0x%x to ALAW...\n", val);
+ dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to ALAW...\n", val);
}
/* Configure video window */
@@ -582,11 +586,11 @@ void ccdc_config_raw(void)
/* Write value in FMTCFG */
regw(val, CCDC_FMTCFG);
- dev_dbg(dev, "\nWriting 0x%x to FMTCFG...\n", val);
+ dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to FMTCFG...\n", val);
/* Configure the color pattern according to mt9t001 sensor */
regw(CCDC_COLPTN_VAL, CCDC_COLPTN);
- dev_dbg(dev, "\nWriting 0xBB11BB11 to COLPTN...\n");
+ dev_dbg(ccdc_cfg.dev, "\nWriting 0xBB11BB11 to COLPTN...\n");
/*
* Configure Data formatter(Video port) pixel selection
* (FMT_HORZ, FMT_VERT)
@@ -596,7 +600,7 @@ void ccdc_config_raw(void)
(params->win.width & CCDC_FMT_HORZ_FMTLNH_MASK);
regw(val, CCDC_FMT_HORZ);
- dev_dbg(dev, "\nWriting 0x%x to FMT_HORZ...\n", val);
+ dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to FMT_HORZ...\n", val);
val = (params->win.top & CCDC_FMT_VERT_FMTSLV_MASK)
<< CCDC_FMT_VERT_FMTSLV_SHIFT;
if (params->frm_fmt == CCDC_FRMFMT_PROGRESSIVE)
@@ -604,13 +608,13 @@ void ccdc_config_raw(void)
else
val |= (params->win.height >> 1) & CCDC_FMT_VERT_FMTLNV_MASK;
- dev_dbg(dev, "\nparams->win.height 0x%x ...\n",
+ dev_dbg(ccdc_cfg.dev, "\nparams->win.height 0x%x ...\n",
params->win.height);
regw(val, CCDC_FMT_VERT);
- dev_dbg(dev, "\nWriting 0x%x to FMT_VERT...\n", val);
+ dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to FMT_VERT...\n", val);
- dev_dbg(dev, "\nbelow regw(val, FMT_VERT)...");
+ dev_dbg(ccdc_cfg.dev, "\nbelow regw(val, FMT_VERT)...");
/*
* Configure Horizontal offset register. If pack 8 is enabled then
@@ -631,17 +635,17 @@ void ccdc_config_raw(void)
if (params->image_invert_enable) {
/* For intelace inverse mode */
regw(CCDC_INTERLACED_IMAGE_INVERT, CCDC_SDOFST);
- dev_dbg(dev, "\nWriting 0x4B6D to SDOFST...\n");
+ dev_dbg(ccdc_cfg.dev, "\nWriting 0x4B6D to SDOFST..\n");
}
else {
/* For intelace non inverse mode */
regw(CCDC_INTERLACED_NO_IMAGE_INVERT, CCDC_SDOFST);
- dev_dbg(dev, "\nWriting 0x0249 to SDOFST...\n");
+ dev_dbg(ccdc_cfg.dev, "\nWriting 0x0249 to SDOFST..\n");
}
} else if (params->frm_fmt == CCDC_FRMFMT_PROGRESSIVE) {
regw(CCDC_PROGRESSIVE_NO_IMAGE_INVERT, CCDC_SDOFST);
- dev_dbg(dev, "\nWriting 0x0000 to SDOFST...\n");
+ dev_dbg(ccdc_cfg.dev, "\nWriting 0x0000 to SDOFST...\n");
}
/*
@@ -662,18 +666,18 @@ void ccdc_config_raw(void)
val |= (params->win.left) & CCDC_VP_OUT_HORZ_ST_MASK;
regw(val, CCDC_VP_OUT);
- dev_dbg(dev, "\nWriting 0x%x to VP_OUT...\n", val);
+ dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to VP_OUT...\n", val);
regw(syn_mode, CCDC_SYN_MODE);
- dev_dbg(dev, "\nWriting 0x%x to SYN_MODE...\n", syn_mode);
+ dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to SYN_MODE...\n", syn_mode);
ccdc_sbl_reset();
- dev_dbg(dev, "\nend of ccdc_config_raw...");
+ dev_dbg(ccdc_cfg.dev, "\nend of ccdc_config_raw...");
ccdc_readregs();
}
static int ccdc_configure(void)
{
- if (ccdc_if_type == VPFE_RAW_BAYER)
+ if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
ccdc_config_raw();
else
ccdc_config_ycbcr();
@@ -682,24 +686,24 @@ static int ccdc_configure(void)
static int ccdc_set_buftype(enum ccdc_buftype buf_type)
{
- if (ccdc_if_type == VPFE_RAW_BAYER)
- ccdc_hw_params_raw.buf_type = buf_type;
+ if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
+ ccdc_cfg.bayer.buf_type = buf_type;
else
- ccdc_hw_params_ycbcr.buf_type = buf_type;
+ ccdc_cfg.ycbcr.buf_type = buf_type;
return 0;
}
static enum ccdc_buftype ccdc_get_buftype(void)
{
- if (ccdc_if_type == VPFE_RAW_BAYER)
- return ccdc_hw_params_raw.buf_type;
- return ccdc_hw_params_ycbcr.buf_type;
+ if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
+ return ccdc_cfg.bayer.buf_type;
+ return ccdc_cfg.ycbcr.buf_type;
}
static int ccdc_enum_pix(u32 *pix, int i)
{
int ret = -EINVAL;
- if (ccdc_if_type == VPFE_RAW_BAYER) {
+ if (ccdc_cfg.if_type == VPFE_RAW_BAYER) {
if (i < ARRAY_SIZE(ccdc_raw_bayer_pix_formats)) {
*pix = ccdc_raw_bayer_pix_formats[i];
ret = 0;
@@ -715,17 +719,17 @@ static int ccdc_enum_pix(u32 *pix, int i)
static int ccdc_set_pixel_format(u32 pixfmt)
{
- if (ccdc_if_type == VPFE_RAW_BAYER) {
- ccdc_hw_params_raw.pix_fmt = CCDC_PIXFMT_RAW;
+ if (ccdc_cfg.if_type == VPFE_RAW_BAYER) {
+ ccdc_cfg.bayer.pix_fmt = CCDC_PIXFMT_RAW;
if (pixfmt == V4L2_PIX_FMT_SBGGR8)
- ccdc_hw_params_raw.config_params.alaw.enable = 1;
+ ccdc_cfg.bayer.config_params.alaw.enable = 1;
else if (pixfmt != V4L2_PIX_FMT_SBGGR16)
return -EINVAL;
} else {
if (pixfmt == V4L2_PIX_FMT_YUYV)
- ccdc_hw_params_ycbcr.pix_order = CCDC_PIXORDER_YCBYCR;
+ ccdc_cfg.ycbcr.pix_order = CCDC_PIXORDER_YCBYCR;
else if (pixfmt == V4L2_PIX_FMT_UYVY)
- ccdc_hw_params_ycbcr.pix_order = CCDC_PIXORDER_CBYCRY;
+ ccdc_cfg.ycbcr.pix_order = CCDC_PIXORDER_CBYCRY;
else
return -EINVAL;
}
@@ -734,17 +738,16 @@ static int ccdc_set_pixel_format(u32 pixfmt)
static u32 ccdc_get_pixel_format(void)
{
- struct ccdc_a_law *alaw =
- &ccdc_hw_params_raw.config_params.alaw;
+ struct ccdc_a_law *alaw = &ccdc_cfg.bayer.config_params.alaw;
u32 pixfmt;
- if (ccdc_if_type == VPFE_RAW_BAYER)
+ if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
if (alaw->enable)
pixfmt = V4L2_PIX_FMT_SBGGR8;
else
pixfmt = V4L2_PIX_FMT_SBGGR16;
else {
- if (ccdc_hw_params_ycbcr.pix_order == CCDC_PIXORDER_YCBYCR)
+ if (ccdc_cfg.ycbcr.pix_order == CCDC_PIXORDER_YCBYCR)
pixfmt = V4L2_PIX_FMT_YUYV;
else
pixfmt = V4L2_PIX_FMT_UYVY;
@@ -754,53 +757,53 @@ static u32 ccdc_get_pixel_format(void)
static int ccdc_set_image_window(struct v4l2_rect *win)
{
- if (ccdc_if_type == VPFE_RAW_BAYER)
- ccdc_hw_params_raw.win = *win;
+ if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
+ ccdc_cfg.bayer.win = *win;
else
- ccdc_hw_params_ycbcr.win = *win;
+ ccdc_cfg.ycbcr.win = *win;
return 0;
}
static void ccdc_get_image_window(struct v4l2_rect *win)
{
- if (ccdc_if_type == VPFE_RAW_BAYER)
- *win = ccdc_hw_params_raw.win;
+ if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
+ *win = ccdc_cfg.bayer.win;
else
- *win = ccdc_hw_params_ycbcr.win;
+ *win = ccdc_cfg.ycbcr.win;
}
static unsigned int ccdc_get_line_length(void)
{
struct ccdc_config_params_raw *config_params =
- &ccdc_hw_params_raw.config_params;
+ &ccdc_cfg.bayer.config_params;
unsigned int len;
- if (ccdc_if_type == VPFE_RAW_BAYER) {
+ if (ccdc_cfg.if_type == VPFE_RAW_BAYER) {
if ((config_params->alaw.enable) ||
(config_params->data_sz == CCDC_DATA_8BITS))
- len = ccdc_hw_params_raw.win.width;
+ len = ccdc_cfg.bayer.win.width;
else
- len = ccdc_hw_params_raw.win.width * 2;
+ len = ccdc_cfg.bayer.win.width * 2;
} else
- len = ccdc_hw_params_ycbcr.win.width * 2;
+ len = ccdc_cfg.ycbcr.win.width * 2;
return ALIGN(len, 32);
}
static int ccdc_set_frame_format(enum ccdc_frmfmt frm_fmt)
{
- if (ccdc_if_type == VPFE_RAW_BAYER)
- ccdc_hw_params_raw.frm_fmt = frm_fmt;
+ if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
+ ccdc_cfg.bayer.frm_fmt = frm_fmt;
else
- ccdc_hw_params_ycbcr.frm_fmt = frm_fmt;
+ ccdc_cfg.ycbcr.frm_fmt = frm_fmt;
return 0;
}
static enum ccdc_frmfmt ccdc_get_frame_format(void)
{
- if (ccdc_if_type == VPFE_RAW_BAYER)
- return ccdc_hw_params_raw.frm_fmt;
+ if (ccdc_cfg.if_type == VPFE_RAW_BAYER)
+ return ccdc_cfg.bayer.frm_fmt;
else
- return ccdc_hw_params_ycbcr.frm_fmt;
+ return ccdc_cfg.ycbcr.frm_fmt;
}
static int ccdc_getfid(void)
@@ -816,14 +819,14 @@ static inline void ccdc_setfbaddr(unsigned long addr)
static int ccdc_set_hw_if_params(struct vpfe_hw_if_param *params)
{
- ccdc_if_type = params->if_type;
+ ccdc_cfg.if_type = params->if_type;
switch (params->if_type) {
case VPFE_BT656:
case VPFE_YCBCR_SYNC_16:
case VPFE_YCBCR_SYNC_8:
- ccdc_hw_params_ycbcr.vd_pol = params->vdpol;
- ccdc_hw_params_ycbcr.hd_pol = params->hdpol;
+ ccdc_cfg.ycbcr.vd_pol = params->vdpol;
+ ccdc_cfg.ycbcr.hd_pol = params->hdpol;
break;
default:
/* TODO add support for raw bayer here */
@@ -838,7 +841,6 @@ static struct ccdc_hw_device ccdc_hw_dev = {
.hw_ops = {
.open = ccdc_open,
.close = ccdc_close,
- .set_ccdc_base = ccdc_set_ccdc_base,
.reset = ccdc_sbl_reset,
.enable = ccdc_enable,
.set_hw_if_params = ccdc_set_hw_if_params,
@@ -859,19 +861,105 @@ static struct ccdc_hw_device ccdc_hw_dev = {
},
};
-static int __init dm644x_ccdc_init(void)
+static int __init dm644x_ccdc_probe(struct platform_device *pdev)
{
- printk(KERN_NOTICE "dm644x_ccdc_init\n");
- if (vpfe_register_ccdc_device(&ccdc_hw_dev) < 0)
- return -1;
- printk(KERN_NOTICE "%s is registered with vpfe.\n",
- ccdc_hw_dev.name);
+ struct resource *res;
+ int status = 0;
+
+ /*
+ * first try to register with vpfe. If not correct platform, then we
+ * don't have to iomap
+ */
+ status = vpfe_register_ccdc_device(&ccdc_hw_dev);
+ if (status < 0)
+ return status;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res) {
+ status = -ENODEV;
+ goto fail_nores;
+ }
+
+ res = request_mem_region(res->start, resource_size(res), res->name);
+ if (!res) {
+ status = -EBUSY;
+ goto fail_nores;
+ }
+
+ ccdc_cfg.base_addr = ioremap_nocache(res->start, resource_size(res));
+ if (!ccdc_cfg.base_addr) {
+ status = -ENOMEM;
+ goto fail_nomem;
+ }
+
+ /* Get and enable Master clock */
+ ccdc_cfg.mclk = clk_get(&pdev->dev, "master");
+ if (NULL == ccdc_cfg.mclk) {
+ status = -ENODEV;
+ goto fail_nomap;
+ }
+ if (clk_enable(ccdc_cfg.mclk)) {
+ status = -ENODEV;
+ goto fail_mclk;
+ }
+
+ /* Get and enable Slave clock */
+ ccdc_cfg.sclk = clk_get(&pdev->dev, "slave");
+ if (NULL == ccdc_cfg.sclk) {
+ status = -ENODEV;
+ goto fail_mclk;
+ }
+ if (clk_enable(ccdc_cfg.sclk)) {
+ status = -ENODEV;
+ goto fail_sclk;
+ }
+ ccdc_cfg.dev = &pdev->dev;
+ printk(KERN_NOTICE "%s is registered with vpfe.\n", ccdc_hw_dev.name);
return 0;
+fail_sclk:
+ clk_put(ccdc_cfg.sclk);
+fail_mclk:
+ clk_put(ccdc_cfg.mclk);
+fail_nomap:
+ iounmap(ccdc_cfg.base_addr);
+fail_nomem:
+ release_mem_region(res->start, resource_size(res));
+fail_nores:
+ vpfe_unregister_ccdc_device(&ccdc_hw_dev);
+ return status;
}
-static void __exit dm644x_ccdc_exit(void)
+static int dm644x_ccdc_remove(struct platform_device *pdev)
{
+ struct resource *res;
+
+ clk_put(ccdc_cfg.mclk);
+ clk_put(ccdc_cfg.sclk);
+ iounmap(ccdc_cfg.base_addr);
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (res)
+ release_mem_region(res->start, resource_size(res));
vpfe_unregister_ccdc_device(&ccdc_hw_dev);
+ return 0;
+}
+
+static struct platform_driver dm644x_ccdc_driver = {
+ .driver = {
+ .name = "dm644x_ccdc",
+ .owner = THIS_MODULE,
+ },
+ .remove = __devexit_p(dm644x_ccdc_remove),
+ .probe = dm644x_ccdc_probe,
+};
+
+static int __init dm644x_ccdc_init(void)
+{
+ return platform_driver_register(&dm644x_ccdc_driver);
+}
+
+static void __exit dm644x_ccdc_exit(void)
+{
+ platform_driver_unregister(&dm644x_ccdc_driver);
}
module_init(dm644x_ccdc_init);
--
1.6.0.4
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH - v4 1/4] V4L-vpfe_capture-remove-clock and platform code
2010-01-11 23:36 ` [PATCH - v4 3/4] V4L-vpfe-capture-converting-dm644x-driver " m-karicheri2
@ 2010-01-11 23:36 ` m-karicheri2
2010-01-12 0:16 ` Kevin Hilman
0 siblings, 1 reply; 11+ messages in thread
From: m-karicheri2 @ 2010-01-11 23:36 UTC (permalink / raw)
To: linux-media, khilman, mchehab
Cc: hverkuil, davinci-linux-open-source, Muralidharan Karicheri
From: Muralidharan Karicheri <m-karicheri2@ti.com>
This combines the two patches sent earlier to change the clock configuration
and converting ccdc drivers to platform drivers. This has updated comments
against v1 of these patches.
In this patch, the clock configuration is moved to ccdc driver since clocks
are configured for ccdc. Also adding proper error codes for ccdc register
function and removing the ccdc memory resource handling.
Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com>
Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com>
Reviewed-by: Hans Verkuil <hverkuil@xs4all.nl>
Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
Signed-off-by: Muralidharan Karicheri <m-karicheri2@ti.com>
---
Rebased to latest linux-next tree
Applies to linux-next tree of v4l-dvb
drivers/media/video/davinci/vpfe_capture.c | 131 +++-------------------------
1 files changed, 13 insertions(+), 118 deletions(-)
diff --git a/drivers/media/video/davinci/vpfe_capture.c b/drivers/media/video/davinci/vpfe_capture.c
index de22bc9..885cd54 100644
--- a/drivers/media/video/davinci/vpfe_capture.c
+++ b/drivers/media/video/davinci/vpfe_capture.c
@@ -107,9 +107,6 @@ struct ccdc_config {
int vpfe_probed;
/* name of ccdc device */
char name[32];
- /* for storing mem maps for CCDC */
- int ccdc_addr_size;
- void *__iomem ccdc_addr;
};
/* data structures */
@@ -229,7 +226,6 @@ int vpfe_register_ccdc_device(struct ccdc_hw_device *dev)
BUG_ON(!dev->hw_ops.set_image_window);
BUG_ON(!dev->hw_ops.get_image_window);
BUG_ON(!dev->hw_ops.get_line_length);
- BUG_ON(!dev->hw_ops.setfbaddr);
BUG_ON(!dev->hw_ops.getfid);
mutex_lock(&ccdc_lock);
@@ -240,25 +236,23 @@ int vpfe_register_ccdc_device(struct ccdc_hw_device *dev)
* walk through it during vpfe probe
*/
printk(KERN_ERR "vpfe capture not initialized\n");
- ret = -1;
+ ret = -EFAULT;
goto unlock;
}
if (strcmp(dev->name, ccdc_cfg->name)) {
/* ignore this ccdc */
- ret = -1;
+ ret = -EINVAL;
goto unlock;
}
if (ccdc_dev) {
printk(KERN_ERR "ccdc already registered\n");
- ret = -1;
+ ret = -EINVAL;
goto unlock;
}
ccdc_dev = dev;
- dev->hw_ops.set_ccdc_base(ccdc_cfg->ccdc_addr,
- ccdc_cfg->ccdc_addr_size);
unlock:
mutex_unlock(&ccdc_lock);
return ret;
@@ -1786,61 +1780,6 @@ static struct vpfe_device *vpfe_initialize(void)
return vpfe_dev;
}
-static void vpfe_disable_clock(struct vpfe_device *vpfe_dev)
-{
- struct vpfe_config *vpfe_cfg = vpfe_dev->cfg;
-
- clk_disable(vpfe_cfg->vpssclk);
- clk_put(vpfe_cfg->vpssclk);
- clk_disable(vpfe_cfg->slaveclk);
- clk_put(vpfe_cfg->slaveclk);
- v4l2_info(vpfe_dev->pdev->driver,
- "vpfe vpss master & slave clocks disabled\n");
-}
-
-static int vpfe_enable_clock(struct vpfe_device *vpfe_dev)
-{
- struct vpfe_config *vpfe_cfg = vpfe_dev->cfg;
- int ret = -ENOENT;
-
- vpfe_cfg->vpssclk = clk_get(vpfe_dev->pdev, "vpss_master");
- if (NULL == vpfe_cfg->vpssclk) {
- v4l2_err(vpfe_dev->pdev->driver, "No clock defined for"
- "vpss_master\n");
- return ret;
- }
-
- if (clk_enable(vpfe_cfg->vpssclk)) {
- v4l2_err(vpfe_dev->pdev->driver,
- "vpfe vpss master clock not enabled\n");
- goto out;
- }
- v4l2_info(vpfe_dev->pdev->driver,
- "vpfe vpss master clock enabled\n");
-
- vpfe_cfg->slaveclk = clk_get(vpfe_dev->pdev, "vpss_slave");
- if (NULL == vpfe_cfg->slaveclk) {
- v4l2_err(vpfe_dev->pdev->driver,
- "No clock defined for vpss slave\n");
- goto out;
- }
-
- if (clk_enable(vpfe_cfg->slaveclk)) {
- v4l2_err(vpfe_dev->pdev->driver,
- "vpfe vpss slave clock not enabled\n");
- goto out;
- }
- v4l2_info(vpfe_dev->pdev->driver, "vpfe vpss slave clock enabled\n");
- return 0;
-out:
- if (vpfe_cfg->vpssclk)
- clk_put(vpfe_cfg->vpssclk);
- if (vpfe_cfg->slaveclk)
- clk_put(vpfe_cfg->slaveclk);
-
- return -1;
-}
-
/*
* vpfe_probe : This function creates device entries by register
* itself to the V4L2 driver and initializes fields of each
@@ -1870,7 +1809,7 @@ static __init int vpfe_probe(struct platform_device *pdev)
if (NULL == pdev->dev.platform_data) {
v4l2_err(pdev->dev.driver, "Unable to get vpfe config\n");
- ret = -ENOENT;
+ ret = -ENODEV;
goto probe_free_dev_mem;
}
@@ -1884,18 +1823,13 @@ static __init int vpfe_probe(struct platform_device *pdev)
goto probe_free_dev_mem;
}
- /* enable vpss clocks */
- ret = vpfe_enable_clock(vpfe_dev);
- if (ret)
- goto probe_free_dev_mem;
-
mutex_lock(&ccdc_lock);
/* Allocate memory for ccdc configuration */
ccdc_cfg = kmalloc(sizeof(struct ccdc_config), GFP_KERNEL);
if (NULL == ccdc_cfg) {
v4l2_err(pdev->dev.driver,
"Memory allocation failed for ccdc_cfg\n");
- goto probe_disable_clock;
+ goto probe_free_dev_mem;
}
strncpy(ccdc_cfg->name, vpfe_cfg->ccdc, 32);
@@ -1904,61 +1838,34 @@ static __init int vpfe_probe(struct platform_device *pdev)
if (!res1) {
v4l2_err(pdev->dev.driver,
"Unable to get interrupt for VINT0\n");
- ret = -ENOENT;
- goto probe_disable_clock;
+ ret = -ENODEV;
+ goto probe_free_ccdc_cfg_mem;
}
vpfe_dev->ccdc_irq0 = res1->start;
/* Get VINT1 irq resource */
- res1 = platform_get_resource(pdev,
- IORESOURCE_IRQ, 1);
+ res1 = platform_get_resource(pdev, IORESOURCE_IRQ, 1);
if (!res1) {
v4l2_err(pdev->dev.driver,
"Unable to get interrupt for VINT1\n");
- ret = -ENOENT;
- goto probe_disable_clock;
+ ret = -ENODEV;
+ goto probe_free_ccdc_cfg_mem;
}
vpfe_dev->ccdc_irq1 = res1->start;
- /* Get address base of CCDC */
- res1 = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- if (!res1) {
- v4l2_err(pdev->dev.driver,
- "Unable to get register address map\n");
- ret = -ENOENT;
- goto probe_disable_clock;
- }
-
- ccdc_cfg->ccdc_addr_size = res1->end - res1->start + 1;
- if (!request_mem_region(res1->start, ccdc_cfg->ccdc_addr_size,
- pdev->dev.driver->name)) {
- v4l2_err(pdev->dev.driver,
- "Failed request_mem_region for ccdc base\n");
- ret = -ENXIO;
- goto probe_disable_clock;
- }
- ccdc_cfg->ccdc_addr = ioremap_nocache(res1->start,
- ccdc_cfg->ccdc_addr_size);
- if (!ccdc_cfg->ccdc_addr) {
- v4l2_err(pdev->dev.driver, "Unable to ioremap ccdc addr\n");
- ret = -ENXIO;
- goto probe_out_release_mem1;
- }
-
ret = request_irq(vpfe_dev->ccdc_irq0, vpfe_isr, IRQF_DISABLED,
"vpfe_capture0", vpfe_dev);
if (0 != ret) {
v4l2_err(pdev->dev.driver, "Unable to request interrupt\n");
- goto probe_out_unmap1;
+ goto probe_free_ccdc_cfg_mem;
}
/* Allocate memory for video device */
vfd = video_device_alloc();
if (NULL == vfd) {
ret = -ENOMEM;
- v4l2_err(pdev->dev.driver,
- "Unable to alloc video device\n");
+ v4l2_err(pdev->dev.driver, "Unable to alloc video device\n");
goto probe_out_release_irq;
}
@@ -2073,12 +1980,7 @@ probe_out_video_release:
video_device_release(vpfe_dev->video_dev);
probe_out_release_irq:
free_irq(vpfe_dev->ccdc_irq0, vpfe_dev);
-probe_out_unmap1:
- iounmap(ccdc_cfg->ccdc_addr);
-probe_out_release_mem1:
- release_mem_region(res1->start, res1->end - res1->start + 1);
-probe_disable_clock:
- vpfe_disable_clock(vpfe_dev);
+probe_free_ccdc_cfg_mem:
mutex_unlock(&ccdc_lock);
kfree(ccdc_cfg);
probe_free_dev_mem:
@@ -2092,7 +1994,6 @@ probe_free_dev_mem:
static int __devexit vpfe_remove(struct platform_device *pdev)
{
struct vpfe_device *vpfe_dev = platform_get_drvdata(pdev);
- struct resource *res;
v4l2_info(pdev->dev.driver, "vpfe_remove\n");
@@ -2100,12 +2001,6 @@ static int __devexit vpfe_remove(struct platform_device *pdev)
kfree(vpfe_dev->sd);
v4l2_device_unregister(&vpfe_dev->v4l2_dev);
video_unregister_device(vpfe_dev->video_dev);
- mutex_lock(&ccdc_lock);
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- release_mem_region(res->start, res->end - res->start + 1);
- iounmap(ccdc_cfg->ccdc_addr);
- mutex_unlock(&ccdc_lock);
- vpfe_disable_clock(vpfe_dev);
kfree(vpfe_dev);
kfree(ccdc_cfg);
return 0;
--
1.6.0.4
^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH - v4 1/4] V4L-vpfe_capture-remove-clock and platform code
2010-01-11 23:36 ` [PATCH - v4 1/4] V4L-vpfe_capture-remove-clock and platform code m-karicheri2
@ 2010-01-12 0:16 ` Kevin Hilman
2010-01-12 14:40 ` Karicheri, Muralidharan
0 siblings, 1 reply; 11+ messages in thread
From: Kevin Hilman @ 2010-01-12 0:16 UTC (permalink / raw)
To: m-karicheri2; +Cc: linux-media, mchehab, hverkuil, davinci-linux-open-source
m-karicheri2@ti.com writes:
> From: Muralidharan Karicheri <m-karicheri2@ti.com>
>
> This combines the two patches sent earlier to change the clock configuration
> and converting ccdc drivers to platform drivers. This has updated comments
> against v1 of these patches.
This part is also not relevant to the git history, and should be after the '---'
> In this patch, the clock configuration is moved to ccdc driver since clocks
> are configured for ccdc. Also adding proper error codes for ccdc register
> function and removing the ccdc memory resource handling.
Also, this doesn't accuratly reflect the changes done in the patch.
Here the clock configuration isn't moved, it's removed. You should
mention it being removed here and added to platform-specific code in
subsequent patches.
Sorry to be so nit-picky about the comments, but having a well-written
and descriptive changelog is extremely importanty. For the benefit of
reading the git history later, and also for those of us less familiar
with the details of these drivers, we rely heavily on a good changelog.
Kevin
> Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com>
> Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com>
> Reviewed-by: Hans Verkuil <hverkuil@xs4all.nl>
>
> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
> Signed-off-by: Muralidharan Karicheri <m-karicheri2@ti.com>
> ---
> Rebased to latest linux-next tree
> Applies to linux-next tree of v4l-dvb
> drivers/media/video/davinci/vpfe_capture.c | 131 +++-------------------------
> 1 files changed, 13 insertions(+), 118 deletions(-)
>
> diff --git a/drivers/media/video/davinci/vpfe_capture.c b/drivers/media/video/davinci/vpfe_capture.c
> index de22bc9..885cd54 100644
> --- a/drivers/media/video/davinci/vpfe_capture.c
> +++ b/drivers/media/video/davinci/vpfe_capture.c
> @@ -107,9 +107,6 @@ struct ccdc_config {
> int vpfe_probed;
> /* name of ccdc device */
> char name[32];
> - /* for storing mem maps for CCDC */
> - int ccdc_addr_size;
> - void *__iomem ccdc_addr;
> };
>
> /* data structures */
> @@ -229,7 +226,6 @@ int vpfe_register_ccdc_device(struct ccdc_hw_device *dev)
> BUG_ON(!dev->hw_ops.set_image_window);
> BUG_ON(!dev->hw_ops.get_image_window);
> BUG_ON(!dev->hw_ops.get_line_length);
> - BUG_ON(!dev->hw_ops.setfbaddr);
> BUG_ON(!dev->hw_ops.getfid);
>
> mutex_lock(&ccdc_lock);
> @@ -240,25 +236,23 @@ int vpfe_register_ccdc_device(struct ccdc_hw_device *dev)
> * walk through it during vpfe probe
> */
> printk(KERN_ERR "vpfe capture not initialized\n");
> - ret = -1;
> + ret = -EFAULT;
> goto unlock;
> }
>
> if (strcmp(dev->name, ccdc_cfg->name)) {
> /* ignore this ccdc */
> - ret = -1;
> + ret = -EINVAL;
> goto unlock;
> }
>
> if (ccdc_dev) {
> printk(KERN_ERR "ccdc already registered\n");
> - ret = -1;
> + ret = -EINVAL;
> goto unlock;
> }
>
> ccdc_dev = dev;
> - dev->hw_ops.set_ccdc_base(ccdc_cfg->ccdc_addr,
> - ccdc_cfg->ccdc_addr_size);
> unlock:
> mutex_unlock(&ccdc_lock);
> return ret;
> @@ -1786,61 +1780,6 @@ static struct vpfe_device *vpfe_initialize(void)
> return vpfe_dev;
> }
>
> -static void vpfe_disable_clock(struct vpfe_device *vpfe_dev)
> -{
> - struct vpfe_config *vpfe_cfg = vpfe_dev->cfg;
> -
> - clk_disable(vpfe_cfg->vpssclk);
> - clk_put(vpfe_cfg->vpssclk);
> - clk_disable(vpfe_cfg->slaveclk);
> - clk_put(vpfe_cfg->slaveclk);
> - v4l2_info(vpfe_dev->pdev->driver,
> - "vpfe vpss master & slave clocks disabled\n");
> -}
> -
> -static int vpfe_enable_clock(struct vpfe_device *vpfe_dev)
> -{
> - struct vpfe_config *vpfe_cfg = vpfe_dev->cfg;
> - int ret = -ENOENT;
> -
> - vpfe_cfg->vpssclk = clk_get(vpfe_dev->pdev, "vpss_master");
> - if (NULL == vpfe_cfg->vpssclk) {
> - v4l2_err(vpfe_dev->pdev->driver, "No clock defined for"
> - "vpss_master\n");
> - return ret;
> - }
> -
> - if (clk_enable(vpfe_cfg->vpssclk)) {
> - v4l2_err(vpfe_dev->pdev->driver,
> - "vpfe vpss master clock not enabled\n");
> - goto out;
> - }
> - v4l2_info(vpfe_dev->pdev->driver,
> - "vpfe vpss master clock enabled\n");
> -
> - vpfe_cfg->slaveclk = clk_get(vpfe_dev->pdev, "vpss_slave");
> - if (NULL == vpfe_cfg->slaveclk) {
> - v4l2_err(vpfe_dev->pdev->driver,
> - "No clock defined for vpss slave\n");
> - goto out;
> - }
> -
> - if (clk_enable(vpfe_cfg->slaveclk)) {
> - v4l2_err(vpfe_dev->pdev->driver,
> - "vpfe vpss slave clock not enabled\n");
> - goto out;
> - }
> - v4l2_info(vpfe_dev->pdev->driver, "vpfe vpss slave clock enabled\n");
> - return 0;
> -out:
> - if (vpfe_cfg->vpssclk)
> - clk_put(vpfe_cfg->vpssclk);
> - if (vpfe_cfg->slaveclk)
> - clk_put(vpfe_cfg->slaveclk);
> -
> - return -1;
> -}
> -
> /*
> * vpfe_probe : This function creates device entries by register
> * itself to the V4L2 driver and initializes fields of each
> @@ -1870,7 +1809,7 @@ static __init int vpfe_probe(struct platform_device *pdev)
>
> if (NULL == pdev->dev.platform_data) {
> v4l2_err(pdev->dev.driver, "Unable to get vpfe config\n");
> - ret = -ENOENT;
> + ret = -ENODEV;
> goto probe_free_dev_mem;
> }
>
> @@ -1884,18 +1823,13 @@ static __init int vpfe_probe(struct platform_device *pdev)
> goto probe_free_dev_mem;
> }
>
> - /* enable vpss clocks */
> - ret = vpfe_enable_clock(vpfe_dev);
> - if (ret)
> - goto probe_free_dev_mem;
> -
> mutex_lock(&ccdc_lock);
> /* Allocate memory for ccdc configuration */
> ccdc_cfg = kmalloc(sizeof(struct ccdc_config), GFP_KERNEL);
> if (NULL == ccdc_cfg) {
> v4l2_err(pdev->dev.driver,
> "Memory allocation failed for ccdc_cfg\n");
> - goto probe_disable_clock;
> + goto probe_free_dev_mem;
> }
>
> strncpy(ccdc_cfg->name, vpfe_cfg->ccdc, 32);
> @@ -1904,61 +1838,34 @@ static __init int vpfe_probe(struct platform_device *pdev)
> if (!res1) {
> v4l2_err(pdev->dev.driver,
> "Unable to get interrupt for VINT0\n");
> - ret = -ENOENT;
> - goto probe_disable_clock;
> + ret = -ENODEV;
> + goto probe_free_ccdc_cfg_mem;
> }
> vpfe_dev->ccdc_irq0 = res1->start;
>
> /* Get VINT1 irq resource */
> - res1 = platform_get_resource(pdev,
> - IORESOURCE_IRQ, 1);
> + res1 = platform_get_resource(pdev, IORESOURCE_IRQ, 1);
> if (!res1) {
> v4l2_err(pdev->dev.driver,
> "Unable to get interrupt for VINT1\n");
> - ret = -ENOENT;
> - goto probe_disable_clock;
> + ret = -ENODEV;
> + goto probe_free_ccdc_cfg_mem;
> }
> vpfe_dev->ccdc_irq1 = res1->start;
>
> - /* Get address base of CCDC */
> - res1 = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> - if (!res1) {
> - v4l2_err(pdev->dev.driver,
> - "Unable to get register address map\n");
> - ret = -ENOENT;
> - goto probe_disable_clock;
> - }
> -
> - ccdc_cfg->ccdc_addr_size = res1->end - res1->start + 1;
> - if (!request_mem_region(res1->start, ccdc_cfg->ccdc_addr_size,
> - pdev->dev.driver->name)) {
> - v4l2_err(pdev->dev.driver,
> - "Failed request_mem_region for ccdc base\n");
> - ret = -ENXIO;
> - goto probe_disable_clock;
> - }
> - ccdc_cfg->ccdc_addr = ioremap_nocache(res1->start,
> - ccdc_cfg->ccdc_addr_size);
> - if (!ccdc_cfg->ccdc_addr) {
> - v4l2_err(pdev->dev.driver, "Unable to ioremap ccdc addr\n");
> - ret = -ENXIO;
> - goto probe_out_release_mem1;
> - }
> -
> ret = request_irq(vpfe_dev->ccdc_irq0, vpfe_isr, IRQF_DISABLED,
> "vpfe_capture0", vpfe_dev);
>
> if (0 != ret) {
> v4l2_err(pdev->dev.driver, "Unable to request interrupt\n");
> - goto probe_out_unmap1;
> + goto probe_free_ccdc_cfg_mem;
> }
>
> /* Allocate memory for video device */
> vfd = video_device_alloc();
> if (NULL == vfd) {
> ret = -ENOMEM;
> - v4l2_err(pdev->dev.driver,
> - "Unable to alloc video device\n");
> + v4l2_err(pdev->dev.driver, "Unable to alloc video device\n");
> goto probe_out_release_irq;
> }
>
> @@ -2073,12 +1980,7 @@ probe_out_video_release:
> video_device_release(vpfe_dev->video_dev);
> probe_out_release_irq:
> free_irq(vpfe_dev->ccdc_irq0, vpfe_dev);
> -probe_out_unmap1:
> - iounmap(ccdc_cfg->ccdc_addr);
> -probe_out_release_mem1:
> - release_mem_region(res1->start, res1->end - res1->start + 1);
> -probe_disable_clock:
> - vpfe_disable_clock(vpfe_dev);
> +probe_free_ccdc_cfg_mem:
> mutex_unlock(&ccdc_lock);
> kfree(ccdc_cfg);
> probe_free_dev_mem:
> @@ -2092,7 +1994,6 @@ probe_free_dev_mem:
> static int __devexit vpfe_remove(struct platform_device *pdev)
> {
> struct vpfe_device *vpfe_dev = platform_get_drvdata(pdev);
> - struct resource *res;
>
> v4l2_info(pdev->dev.driver, "vpfe_remove\n");
>
> @@ -2100,12 +2001,6 @@ static int __devexit vpfe_remove(struct platform_device *pdev)
> kfree(vpfe_dev->sd);
> v4l2_device_unregister(&vpfe_dev->v4l2_dev);
> video_unregister_device(vpfe_dev->video_dev);
> - mutex_lock(&ccdc_lock);
> - res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> - release_mem_region(res->start, res->end - res->start + 1);
> - iounmap(ccdc_cfg->ccdc_addr);
> - mutex_unlock(&ccdc_lock);
> - vpfe_disable_clock(vpfe_dev);
> kfree(vpfe_dev);
> kfree(ccdc_cfg);
> return 0;
> --
> 1.6.0.4
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH - v4 2/4] V4L-vpfe-capture-converting dm355 ccdc driver to a platform driver
2010-01-11 23:36 ` [PATCH - v4 2/4] V4L-vpfe-capture-converting dm355 ccdc driver to a platform driver m-karicheri2
2010-01-11 23:36 ` [PATCH - v4 3/4] V4L-vpfe-capture-converting-dm644x-driver " m-karicheri2
@ 2010-01-12 0:22 ` Kevin Hilman
1 sibling, 0 replies; 11+ messages in thread
From: Kevin Hilman @ 2010-01-12 0:22 UTC (permalink / raw)
To: m-karicheri2; +Cc: linux-media, mchehab, hverkuil, davinci-linux-open-source
m-karicheri2@ti.com writes:
> From: Muralidharan Karicheri <m-karicheri2@ti.com>
>
> Updated based on Kevin's comments on clock configuration.
This part belongs after the '---'
> The ccdc now uses a generic name for clocks. "master" and "slave". On individual platforms
> these clocks will inherit from the platform specific clock. This will allow re-use of
> the driver for the same IP across different SoCs.
>
> Following are the changes done:-
> 1) clocks are configured using generic clock names
> 2) converting the driver to a platform driver
> 3) cleanup - consolidate all static variables inside a structure, ccdc_cfg
>
> Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com>
> Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com>
> Reviewed-by: Hans Verkuil <hverkuil@xs4all.nl>
>
> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
> Signed-off-by: Muralidharan Karicheri <m-karicheri2@ti.com>
> ---
> Rebased to latest linux-next tree
> Applies to linux-next branch of v4l-dvb
> drivers/media/video/davinci/dm355_ccdc.c | 409 +++++++++++++++++++-----------
> 1 files changed, 256 insertions(+), 153 deletions(-)
>
[...]
> -static int __init dm355_ccdc_init(void)
> +static int __init dm355_ccdc_probe(struct platform_device *pdev)
> {
> - printk(KERN_NOTICE "dm355_ccdc_init\n");
> - if (vpfe_register_ccdc_device(&ccdc_hw_dev) < 0)
> - return -1;
> - printk(KERN_NOTICE "%s is registered with vpfe.\n",
> - ccdc_hw_dev.name);
> + void (*setup_pinmux)(void);
> + struct resource *res;
> + int status = 0;
> +
> + /*
> + * first try to register with vpfe. If not correct platform, then we
> + * don't have to iomap
> + */
> + status = vpfe_register_ccdc_device(&ccdc_hw_dev);
> + if (status < 0)
> + return status;
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + if (!res) {
> + status = -ENODEV;
> + goto fail_nores;
> + }
> +
> + res = request_mem_region(res->start, resource_size(res), res->name);
> + if (!res) {
> + status = -EBUSY;
> + goto fail_nores;
> + }
> +
> + ccdc_cfg.base_addr = ioremap_nocache(res->start, resource_size(res));
> + if (!ccdc_cfg.base_addr) {
> + status = -ENOMEM;
> + goto fail_nomem;
> + }
> +
> + /* Get and enable Master clock */
> + ccdc_cfg.mclk = clk_get(&pdev->dev, "master");
> + if (NULL == ccdc_cfg.mclk) {
This should be an IS_ERR() check, not a NULL pointer check.
> + status = -ENODEV;
> + goto fail_nomap;
> + }
> + if (clk_enable(ccdc_cfg.mclk)) {
> + status = -ENODEV;
> + goto fail_mclk;
> + }
> +
> + /* Get and enable Slave clock */
> + ccdc_cfg.sclk = clk_get(&pdev->dev, "slave");
> + if (NULL == ccdc_cfg.sclk) {
IS_ERR()
All the same comments for the dm644x version.
Kevin
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH - v4 4/4] DaVinci-vpfe-capture-converting-ccdc-drivers-to-platform-drivers
2010-01-11 23:36 [PATCH - v4 4/4] DaVinci-vpfe-capture-converting-ccdc-drivers-to-platform-drivers m-karicheri2
2010-01-11 23:36 ` [PATCH - v4 2/4] V4L-vpfe-capture-converting dm355 ccdc driver to a platform driver m-karicheri2
@ 2010-01-12 0:28 ` Kevin Hilman
1 sibling, 0 replies; 11+ messages in thread
From: Kevin Hilman @ 2010-01-12 0:28 UTC (permalink / raw)
To: m-karicheri2; +Cc: linux-media, mchehab, hverkuil, davinci-linux-open-source
m-karicheri2@ti.com writes:
> From: Muralidharan Karicheri <m-karicheri2@ti.com>
>
> Following are the changes from v3 :-
>
> - added ccdc clocks through clk_add_alias() calls
All the 'changes from vN' comments are not really relevant to the
final git history. Please add them after the '---' as well. Thanks.
> This combines the two patches sent earlier to change the clock configuration
> and converting ccdc drivers to platform drivers. This has updated comments
> against v2 of these patches. Two new clocks "master" and "slave" are defined for ccdc driver
> as per comments from Kevin Hilman.
This also isn't really relevant for the final git history.
> This adds platform code for ccdc driver on DM355 and DM6446.
And this isn't an adequate description of all the things happening in
this patch. You need to describe not only what is happening but why
for all of the below:
- new CCDC platform_devices
- new clock aliases for CCDC clocks
- pin-mux setup hook now in platform_data
Kevin
> Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com>
> Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com>
> Reviewed-by: Hans Verkuil <hverkuil@xs4all.nl>
>
> Signed-off-by: Muralidharan Karicheri <m-karicheri2@ti.com>
> ---
> Re-sending the patches based on Kevin's comments.
> Applies to Linus tree
> arch/arm/mach-davinci/dm355.c | 43 +++++++++++++++++++++++++++------------
> arch/arm/mach-davinci/dm644x.c | 21 ++++++++++++++++++-
> 2 files changed, 50 insertions(+), 14 deletions(-)
>
> diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
> index dedf4d4..d84e854 100644
> --- a/arch/arm/mach-davinci/dm355.c
> +++ b/arch/arm/mach-davinci/dm355.c
> @@ -125,7 +125,6 @@ static struct clk vpss_slave_clk = {
> .lpsc = DAVINCI_LPSC_VPSSSLV,
> };
>
> -
> static struct clk clkout1_clk = {
> .name = "clkout1",
> .parent = &pll1_aux_clk,
> @@ -665,6 +664,17 @@ static struct platform_device dm355_asp1_device = {
> .resource = dm355_asp1_resources,
> };
>
> +static void dm355_ccdc_setup_pinmux(void)
> +{
> + davinci_cfg_reg(DM355_VIN_PCLK);
> + davinci_cfg_reg(DM355_VIN_CAM_WEN);
> + davinci_cfg_reg(DM355_VIN_CAM_VD);
> + davinci_cfg_reg(DM355_VIN_CAM_HD);
> + davinci_cfg_reg(DM355_VIN_YIN_EN);
> + davinci_cfg_reg(DM355_VIN_CINL_EN);
> + davinci_cfg_reg(DM355_VIN_CINH_EN);
> +}
> +
> static struct resource dm355_vpss_resources[] = {
> {
> /* VPSS BL Base address */
> @@ -701,6 +711,10 @@ static struct resource vpfe_resources[] = {
> .end = IRQ_VDINT1,
> .flags = IORESOURCE_IRQ,
> },
> +};
> +
> +static u64 vpfe_capture_dma_mask = DMA_BIT_MASK(32);
> +static struct resource dm355_ccdc_resource[] = {
> /* CCDC Base address */
> {
> .flags = IORESOURCE_MEM,
> @@ -708,8 +722,18 @@ static struct resource vpfe_resources[] = {
> .end = 0x01c70600 + 0x1ff,
> },
> };
> +static struct platform_device dm355_ccdc_dev = {
> + .name = "dm355_ccdc",
> + .id = -1,
> + .num_resources = ARRAY_SIZE(dm355_ccdc_resource),
> + .resource = dm355_ccdc_resource,
> + .dev = {
> + .dma_mask = &vpfe_capture_dma_mask,
> + .coherent_dma_mask = DMA_BIT_MASK(32),
> + .platform_data = dm355_ccdc_setup_pinmux,
> + },
> +};
>
> -static u64 vpfe_capture_dma_mask = DMA_BIT_MASK(32);
> static struct platform_device vpfe_capture_dev = {
> .name = CAPTURE_DRV_NAME,
> .id = -1,
> @@ -857,20 +881,13 @@ static int __init dm355_init_devices(void)
> if (!cpu_is_davinci_dm355())
> return 0;
>
> + /* Add ccdc clock aliases */
> + clk_add_alias("master", dm355_ccdc_dev.name, "vpss_master", NULL);
> + clk_add_alias("slave", dm355_ccdc_dev.name, "vpss_master", NULL);
> davinci_cfg_reg(DM355_INT_EDMA_CC);
> platform_device_register(&dm355_edma_device);
> platform_device_register(&dm355_vpss_device);
> - /*
> - * setup Mux configuration for vpfe input and register
> - * vpfe capture platform device
> - */
> - davinci_cfg_reg(DM355_VIN_PCLK);
> - davinci_cfg_reg(DM355_VIN_CAM_WEN);
> - davinci_cfg_reg(DM355_VIN_CAM_VD);
> - davinci_cfg_reg(DM355_VIN_CAM_HD);
> - davinci_cfg_reg(DM355_VIN_YIN_EN);
> - davinci_cfg_reg(DM355_VIN_CINL_EN);
> - davinci_cfg_reg(DM355_VIN_CINH_EN);
> + platform_device_register(&dm355_ccdc_dev);
> platform_device_register(&vpfe_capture_dev);
>
> return 0;
> diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
> index 2cd0081..92aeb56 100644
> --- a/arch/arm/mach-davinci/dm644x.c
> +++ b/arch/arm/mach-davinci/dm644x.c
> @@ -612,6 +612,11 @@ static struct resource vpfe_resources[] = {
> .end = IRQ_VDINT1,
> .flags = IORESOURCE_IRQ,
> },
> +};
> +
> +static u64 vpfe_capture_dma_mask = DMA_BIT_MASK(32);
> +static struct resource dm644x_ccdc_resource[] = {
> + /* CCDC Base address */
> {
> .start = 0x01c70400,
> .end = 0x01c70400 + 0xff,
> @@ -619,7 +624,17 @@ static struct resource vpfe_resources[] = {
> },
> };
>
> -static u64 vpfe_capture_dma_mask = DMA_BIT_MASK(32);
> +static struct platform_device dm644x_ccdc_dev = {
> + .name = "dm644x_ccdc",
> + .id = -1,
> + .num_resources = ARRAY_SIZE(dm644x_ccdc_resource),
> + .resource = dm644x_ccdc_resource,
> + .dev = {
> + .dma_mask = &vpfe_capture_dma_mask,
> + .coherent_dma_mask = DMA_BIT_MASK(32),
> + },
> +};
> +
> static struct platform_device vpfe_capture_dev = {
> .name = CAPTURE_DRV_NAME,
> .id = -1,
> @@ -769,9 +784,13 @@ static int __init dm644x_init_devices(void)
> if (!cpu_is_davinci_dm644x())
> return 0;
>
> + /* Add ccdc clock aliases */
> + clk_add_alias("master", dm644x_ccdc_dev.name, "vpss_master", NULL);
> + clk_add_alias("slave", dm644x_ccdc_dev.name, "vpss_slave", NULL);
> platform_device_register(&dm644x_edma_device);
> platform_device_register(&dm644x_emac_device);
> platform_device_register(&dm644x_vpss_device);
> + platform_device_register(&dm644x_ccdc_dev);
> platform_device_register(&vpfe_capture_dev);
>
> return 0;
> --
> 1.6.0.4
^ permalink raw reply [flat|nested] 11+ messages in thread
* RE: [PATCH - v4 1/4] V4L-vpfe_capture-remove-clock and platform code
2010-01-12 0:16 ` Kevin Hilman
@ 2010-01-12 14:40 ` Karicheri, Muralidharan
2010-01-12 16:19 ` Kevin Hilman
0 siblings, 1 reply; 11+ messages in thread
From: Karicheri, Muralidharan @ 2010-01-12 14:40 UTC (permalink / raw)
To: Kevin Hilman
Cc: linux-media@vger.kernel.org, mchehab@infradead.org,
hverkuil@xs4all.nl,
davinci-linux-open-source@linux.davincidsp.com
Murali Karicheri
Software Design Engineer
Texas Instruments Inc.
Germantown, MD 20874
phone: 301-407-9583
email: m-karicheri2@ti.com
>-----Original Message-----
>From: Kevin Hilman [mailto:khilman@deeprootsystems.com]
>Sent: Monday, January 11, 2010 7:17 PM
>To: Karicheri, Muralidharan
>Cc: linux-media@vger.kernel.org; mchehab@infradead.org; hverkuil@xs4all.nl;
>davinci-linux-open-source@linux.davincidsp.com
>Subject: Re: [PATCH - v4 1/4] V4L-vpfe_capture-remove-clock and platform
>code
>
>m-karicheri2@ti.com writes:
>
>> From: Muralidharan Karicheri <m-karicheri2@ti.com>
>>
>> This combines the two patches sent earlier to change the clock
>configuration
>> and converting ccdc drivers to platform drivers. This has updated
>comments
>> against v1 of these patches.
>
>This part is also not relevant to the git history, and should be after the
>'---'
>
>> In this patch, the clock configuration is moved to ccdc driver since
>clocks
>> are configured for ccdc. Also adding proper error codes for ccdc register
>> function and removing the ccdc memory resource handling.
>
>Also, this doesn't accuratly reflect the changes done in the patch.
>
>Here the clock configuration isn't moved, it's removed. You should
>mention it being removed here and added to platform-specific code in
>subsequent patches.
>
>Sorry to be so nit-picky about the comments, but having a well-written
>and descriptive changelog is extremely importanty. For the benefit of
>reading the git history later, and also for those of us less familiar
>with the details of these drivers, we rely heavily on a good changelog.
>
[MK] I think you are being too picky on these comments :( Besides this was
gone through several reviews and I was wondering why you chose to ignore these comments earlier. It was now being sent for merge, not for review.
This is really not helping the upstream merge :(
Anyways, I will make these changes and send again.
>Kevin
>
>> Reviewed-by: Vaibhav Hiremath <hvaibhav@ti.com>
>> Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com>
>> Reviewed-by: Hans Verkuil <hverkuil@xs4all.nl>
>>
>> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
>> Signed-off-by: Muralidharan Karicheri <m-karicheri2@ti.com>
>> ---
>> Rebased to latest linux-next tree
>> Applies to linux-next tree of v4l-dvb
>> drivers/media/video/davinci/vpfe_capture.c | 131 +++-------------------
>------
>> 1 files changed, 13 insertions(+), 118 deletions(-)
>>
>> diff --git a/drivers/media/video/davinci/vpfe_capture.c
>b/drivers/media/video/davinci/vpfe_capture.c
>> index de22bc9..885cd54 100644
>> --- a/drivers/media/video/davinci/vpfe_capture.c
>> +++ b/drivers/media/video/davinci/vpfe_capture.c
>> @@ -107,9 +107,6 @@ struct ccdc_config {
>> int vpfe_probed;
>> /* name of ccdc device */
>> char name[32];
>> - /* for storing mem maps for CCDC */
>> - int ccdc_addr_size;
>> - void *__iomem ccdc_addr;
>> };
>>
>> /* data structures */
>> @@ -229,7 +226,6 @@ int vpfe_register_ccdc_device(struct ccdc_hw_device
>*dev)
>> BUG_ON(!dev->hw_ops.set_image_window);
>> BUG_ON(!dev->hw_ops.get_image_window);
>> BUG_ON(!dev->hw_ops.get_line_length);
>> - BUG_ON(!dev->hw_ops.setfbaddr);
>> BUG_ON(!dev->hw_ops.getfid);
>>
>> mutex_lock(&ccdc_lock);
>> @@ -240,25 +236,23 @@ int vpfe_register_ccdc_device(struct ccdc_hw_device
>*dev)
>> * walk through it during vpfe probe
>> */
>> printk(KERN_ERR "vpfe capture not initialized\n");
>> - ret = -1;
>> + ret = -EFAULT;
>> goto unlock;
>> }
>>
>> if (strcmp(dev->name, ccdc_cfg->name)) {
>> /* ignore this ccdc */
>> - ret = -1;
>> + ret = -EINVAL;
>> goto unlock;
>> }
>>
>> if (ccdc_dev) {
>> printk(KERN_ERR "ccdc already registered\n");
>> - ret = -1;
>> + ret = -EINVAL;
>> goto unlock;
>> }
>>
>> ccdc_dev = dev;
>> - dev->hw_ops.set_ccdc_base(ccdc_cfg->ccdc_addr,
>> - ccdc_cfg->ccdc_addr_size);
>> unlock:
>> mutex_unlock(&ccdc_lock);
>> return ret;
>> @@ -1786,61 +1780,6 @@ static struct vpfe_device *vpfe_initialize(void)
>> return vpfe_dev;
>> }
>>
>> -static void vpfe_disable_clock(struct vpfe_device *vpfe_dev)
>> -{
>> - struct vpfe_config *vpfe_cfg = vpfe_dev->cfg;
>> -
>> - clk_disable(vpfe_cfg->vpssclk);
>> - clk_put(vpfe_cfg->vpssclk);
>> - clk_disable(vpfe_cfg->slaveclk);
>> - clk_put(vpfe_cfg->slaveclk);
>> - v4l2_info(vpfe_dev->pdev->driver,
>> - "vpfe vpss master & slave clocks disabled\n");
>> -}
>> -
>> -static int vpfe_enable_clock(struct vpfe_device *vpfe_dev)
>> -{
>> - struct vpfe_config *vpfe_cfg = vpfe_dev->cfg;
>> - int ret = -ENOENT;
>> -
>> - vpfe_cfg->vpssclk = clk_get(vpfe_dev->pdev, "vpss_master");
>> - if (NULL == vpfe_cfg->vpssclk) {
>> - v4l2_err(vpfe_dev->pdev->driver, "No clock defined for"
>> - "vpss_master\n");
>> - return ret;
>> - }
>> -
>> - if (clk_enable(vpfe_cfg->vpssclk)) {
>> - v4l2_err(vpfe_dev->pdev->driver,
>> - "vpfe vpss master clock not enabled\n");
>> - goto out;
>> - }
>> - v4l2_info(vpfe_dev->pdev->driver,
>> - "vpfe vpss master clock enabled\n");
>> -
>> - vpfe_cfg->slaveclk = clk_get(vpfe_dev->pdev, "vpss_slave");
>> - if (NULL == vpfe_cfg->slaveclk) {
>> - v4l2_err(vpfe_dev->pdev->driver,
>> - "No clock defined for vpss slave\n");
>> - goto out;
>> - }
>> -
>> - if (clk_enable(vpfe_cfg->slaveclk)) {
>> - v4l2_err(vpfe_dev->pdev->driver,
>> - "vpfe vpss slave clock not enabled\n");
>> - goto out;
>> - }
>> - v4l2_info(vpfe_dev->pdev->driver, "vpfe vpss slave clock enabled\n");
>> - return 0;
>> -out:
>> - if (vpfe_cfg->vpssclk)
>> - clk_put(vpfe_cfg->vpssclk);
>> - if (vpfe_cfg->slaveclk)
>> - clk_put(vpfe_cfg->slaveclk);
>> -
>> - return -1;
>> -}
>> -
>> /*
>> * vpfe_probe : This function creates device entries by register
>> * itself to the V4L2 driver and initializes fields of each
>> @@ -1870,7 +1809,7 @@ static __init int vpfe_probe(struct platform_device
>*pdev)
>>
>> if (NULL == pdev->dev.platform_data) {
>> v4l2_err(pdev->dev.driver, "Unable to get vpfe config\n");
>> - ret = -ENOENT;
>> + ret = -ENODEV;
>> goto probe_free_dev_mem;
>> }
>>
>> @@ -1884,18 +1823,13 @@ static __init int vpfe_probe(struct
>platform_device *pdev)
>> goto probe_free_dev_mem;
>> }
>>
>> - /* enable vpss clocks */
>> - ret = vpfe_enable_clock(vpfe_dev);
>> - if (ret)
>> - goto probe_free_dev_mem;
>> -
>> mutex_lock(&ccdc_lock);
>> /* Allocate memory for ccdc configuration */
>> ccdc_cfg = kmalloc(sizeof(struct ccdc_config), GFP_KERNEL);
>> if (NULL == ccdc_cfg) {
>> v4l2_err(pdev->dev.driver,
>> "Memory allocation failed for ccdc_cfg\n");
>> - goto probe_disable_clock;
>> + goto probe_free_dev_mem;
>> }
>>
>> strncpy(ccdc_cfg->name, vpfe_cfg->ccdc, 32);
>> @@ -1904,61 +1838,34 @@ static __init int vpfe_probe(struct
>platform_device *pdev)
>> if (!res1) {
>> v4l2_err(pdev->dev.driver,
>> "Unable to get interrupt for VINT0\n");
>> - ret = -ENOENT;
>> - goto probe_disable_clock;
>> + ret = -ENODEV;
>> + goto probe_free_ccdc_cfg_mem;
>> }
>> vpfe_dev->ccdc_irq0 = res1->start;
>>
>> /* Get VINT1 irq resource */
>> - res1 = platform_get_resource(pdev,
>> - IORESOURCE_IRQ, 1);
>> + res1 = platform_get_resource(pdev, IORESOURCE_IRQ, 1);
>> if (!res1) {
>> v4l2_err(pdev->dev.driver,
>> "Unable to get interrupt for VINT1\n");
>> - ret = -ENOENT;
>> - goto probe_disable_clock;
>> + ret = -ENODEV;
>> + goto probe_free_ccdc_cfg_mem;
>> }
>> vpfe_dev->ccdc_irq1 = res1->start;
>>
>> - /* Get address base of CCDC */
>> - res1 = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>> - if (!res1) {
>> - v4l2_err(pdev->dev.driver,
>> - "Unable to get register address map\n");
>> - ret = -ENOENT;
>> - goto probe_disable_clock;
>> - }
>> -
>> - ccdc_cfg->ccdc_addr_size = res1->end - res1->start + 1;
>> - if (!request_mem_region(res1->start, ccdc_cfg->ccdc_addr_size,
>> - pdev->dev.driver->name)) {
>> - v4l2_err(pdev->dev.driver,
>> - "Failed request_mem_region for ccdc base\n");
>> - ret = -ENXIO;
>> - goto probe_disable_clock;
>> - }
>> - ccdc_cfg->ccdc_addr = ioremap_nocache(res1->start,
>> - ccdc_cfg->ccdc_addr_size);
>> - if (!ccdc_cfg->ccdc_addr) {
>> - v4l2_err(pdev->dev.driver, "Unable to ioremap ccdc addr\n");
>> - ret = -ENXIO;
>> - goto probe_out_release_mem1;
>> - }
>> -
>> ret = request_irq(vpfe_dev->ccdc_irq0, vpfe_isr, IRQF_DISABLED,
>> "vpfe_capture0", vpfe_dev);
>>
>> if (0 != ret) {
>> v4l2_err(pdev->dev.driver, "Unable to request interrupt\n");
>> - goto probe_out_unmap1;
>> + goto probe_free_ccdc_cfg_mem;
>> }
>>
>> /* Allocate memory for video device */
>> vfd = video_device_alloc();
>> if (NULL == vfd) {
>> ret = -ENOMEM;
>> - v4l2_err(pdev->dev.driver,
>> - "Unable to alloc video device\n");
>> + v4l2_err(pdev->dev.driver, "Unable to alloc video device\n");
>> goto probe_out_release_irq;
>> }
>>
>> @@ -2073,12 +1980,7 @@ probe_out_video_release:
>> video_device_release(vpfe_dev->video_dev);
>> probe_out_release_irq:
>> free_irq(vpfe_dev->ccdc_irq0, vpfe_dev);
>> -probe_out_unmap1:
>> - iounmap(ccdc_cfg->ccdc_addr);
>> -probe_out_release_mem1:
>> - release_mem_region(res1->start, res1->end - res1->start + 1);
>> -probe_disable_clock:
>> - vpfe_disable_clock(vpfe_dev);
>> +probe_free_ccdc_cfg_mem:
>> mutex_unlock(&ccdc_lock);
>> kfree(ccdc_cfg);
>> probe_free_dev_mem:
>> @@ -2092,7 +1994,6 @@ probe_free_dev_mem:
>> static int __devexit vpfe_remove(struct platform_device *pdev)
>> {
>> struct vpfe_device *vpfe_dev = platform_get_drvdata(pdev);
>> - struct resource *res;
>>
>> v4l2_info(pdev->dev.driver, "vpfe_remove\n");
>>
>> @@ -2100,12 +2001,6 @@ static int __devexit vpfe_remove(struct
>platform_device *pdev)
>> kfree(vpfe_dev->sd);
>> v4l2_device_unregister(&vpfe_dev->v4l2_dev);
>> video_unregister_device(vpfe_dev->video_dev);
>> - mutex_lock(&ccdc_lock);
>> - res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>> - release_mem_region(res->start, res->end - res->start + 1);
>> - iounmap(ccdc_cfg->ccdc_addr);
>> - mutex_unlock(&ccdc_lock);
>> - vpfe_disable_clock(vpfe_dev);
>> kfree(vpfe_dev);
>> kfree(ccdc_cfg);
>> return 0;
>> --
>> 1.6.0.4
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH - v4 1/4] V4L-vpfe_capture-remove-clock and platform code
2010-01-12 14:40 ` Karicheri, Muralidharan
@ 2010-01-12 16:19 ` Kevin Hilman
0 siblings, 0 replies; 11+ messages in thread
From: Kevin Hilman @ 2010-01-12 16:19 UTC (permalink / raw)
To: Karicheri, Muralidharan
Cc: linux-media@vger.kernel.org, mchehab@infradead.org,
hverkuil@xs4all.nl,
davinci-linux-open-source@linux.davincidsp.com
"Karicheri, Muralidharan" <m-karicheri2@ti.com> writes:
[...]
>>
>>Also, this doesn't accuratly reflect the changes done in the patch.
>>
>>Here the clock configuration isn't moved, it's removed. You should
>>mention it being removed here and added to platform-specific code in
>>subsequent patches.
>>
>>Sorry to be so nit-picky about the comments, but having a well-written
>>and descriptive changelog is extremely importanty. For the benefit of
>>reading the git history later, and also for those of us less familiar
>>with the details of these drivers, we rely heavily on a good changelog.
>>
>
> [MK] I think you are being too picky on these comments :(
Part of my role is to be picky. ;)
> Besides this was gone through several reviews and I was wondering
> why you chose to ignore these comments earlier. It was now being
> sent for merge, not for review.
I did not do a detailed review in the earlier versions because I was
leaving this to be thoroughly reviewed by linux-media folks.
However, with all the clock issues, I decided to give it a more
thorough review, and I found the changelogs to not be helpful in
understanding the patches.
The linux-media maintainers are certainly free to merge the stuff with
the current confusing changelog, but I would not recommend it.
> This is really not helping the upstream merge :(
Well, it may be taking a bit longer, but it is helping the quality of
the changes that are eventually merged upstream.
> Anyways, I will make these changes and send again.
Thanks,
Kevin
^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2010-01-12 16:19 UTC | newest]
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2010-01-11 23:36 [PATCH - v4 4/4] DaVinci-vpfe-capture-converting-ccdc-drivers-to-platform-drivers m-karicheri2
2010-01-11 23:36 ` [PATCH - v4 2/4] V4L-vpfe-capture-converting dm355 ccdc driver to a platform driver m-karicheri2
2010-01-11 23:36 ` [PATCH - v4 3/4] V4L-vpfe-capture-converting-dm644x-driver " m-karicheri2
2010-01-11 23:36 ` [PATCH - v4 1/4] V4L-vpfe_capture-remove-clock and platform code m-karicheri2
2010-01-12 0:16 ` Kevin Hilman
2010-01-12 14:40 ` Karicheri, Muralidharan
2010-01-12 16:19 ` Kevin Hilman
2010-01-12 0:22 ` [PATCH - v4 2/4] V4L-vpfe-capture-converting dm355 ccdc driver to a platform driver Kevin Hilman
2010-01-12 0:28 ` [PATCH - v4 4/4] DaVinci-vpfe-capture-converting-ccdc-drivers-to-platform-drivers Kevin Hilman
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2010-01-11 19:22 m-karicheri2
2010-01-11 19:22 ` [PATCH - v4 2/4] V4L-vpfe-capture-converting dm355 ccdc driver to a platform driver m-karicheri2
2010-01-11 21:38 ` Kevin Hilman
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