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From: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
To: Samuel Holland <samuel@sholland.org>
Cc: Chen-Yu Tsai <wens@csie.org>,
	Jernej Skrabec <jernej.skrabec@gmail.com>,
	Mauro Carvalho Chehab <mchehab@kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Conor Dooley <conor@kernel.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Maxime Ripard <mripard@kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-media@vger.kernel.org,
	linux-riscv@lists.infradead.org, linux-staging@lists.linux.dev,
	linux-sunxi@lists.linux.dev
Subject: Re: [PATCH 4/4] riscv: dts: allwinner: d1: Add video engine node
Date: Thu, 5 Jan 2023 11:11:49 +0100	[thread overview]
Message-ID: <Y7aiZdjI8L5h1Ca3@aptenodytes> (raw)
In-Reply-To: <20221231164628.19688-5-samuel@sholland.org>

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Hi Samuel,

On Sat 31 Dec 22, 10:46, Samuel Holland wrote:
> D1 contains a video engine which is supported by the Cedrus driver.

Does it work "outside the box" without power domain management?
If not, it might be a bit confusing to add the node at this point.

Cheers,

Paul
 
> Signed-off-by: Samuel Holland <samuel@sholland.org>
> ---
> 
>  arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
> index dff363a3c934..4bd374279155 100644
> --- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
> +++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
> @@ -34,6 +34,17 @@ soc {
>  		#address-cells = <1>;
>  		#size-cells = <1>;
>  
> +		ve: video-codec@1c0e000 {
> +			compatible = "allwinner,sun20i-d1-video-engine";
> +			reg = <0x1c0e000 0x2000>;
> +			interrupts = <SOC_PERIPHERAL_IRQ(66) IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&ccu CLK_BUS_VE>,
> +				 <&ccu CLK_VE>,
> +				 <&ccu CLK_MBUS_VE>;
> +			clock-names = "ahb", "mod", "ram";
> +			resets = <&ccu RST_BUS_VE>;
> +		};
> +
>  		pio: pinctrl@2000000 {
>  			compatible = "allwinner,sun20i-d1-pinctrl";
>  			reg = <0x2000000 0x800>;
> -- 
> 2.37.4
> 

-- 
Paul Kocialkowski, Bootlin
Embedded Linux and kernel engineering
https://bootlin.com

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  reply	other threads:[~2023-01-05 10:12 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-31 16:46 [PATCH 0/4] Allwinner D1 video engine support Samuel Holland
2022-12-31 16:46 ` [PATCH 1/4] media: dt-bindings: cedrus: Allow power domain references Samuel Holland
2022-12-31 19:05   ` Krzysztof Kozlowski
2023-01-05 10:43   ` Paul Kocialkowski
2023-01-05 14:48     ` Samuel Holland
2023-01-05 16:18   ` Jernej Škrabec
2022-12-31 16:46 ` [PATCH 2/4] media: dt-bindings: cedrus: Make allwinner,sram optional Samuel Holland
2022-12-31 19:06   ` Krzysztof Kozlowski
2023-01-05  9:57   ` Paul Kocialkowski
2022-12-31 16:46 ` [PATCH 3/4] media: cedrus: Make SRAM section claiming optional Samuel Holland
2023-01-05 10:02   ` Paul Kocialkowski
2023-01-05 16:19   ` Jernej Škrabec
2022-12-31 16:46 ` [PATCH 4/4] riscv: dts: allwinner: d1: Add video engine node Samuel Holland
2023-01-05 10:11   ` Paul Kocialkowski [this message]
2023-01-05 14:38     ` Samuel Holland
2023-01-05 16:21       ` Jernej Škrabec
2023-02-15  0:25         ` Palmer Dabbelt
2023-01-23 12:33 ` [PATCH 0/4] Allwinner D1 video engine support Hans Verkuil
2023-01-24  5:11   ` Samuel Holland

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