From: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
To: Benjamin Gaignard <benjamin.gaignard@collabora.com>
Cc: mchehab@kernel.org, hverkuil@xs4all.nl, p.zabel@pengutronix.de,
gregkh@linuxfoundation.org, mripard@kernel.org,
paul.kocialkowski@bootlin.com, wens@csie.org,
jernej.skrabec@gmail.com, samuel@sholland.org,
nicolas.dufresne@collabora.com, andrzej.p@collabora.com,
linux-media@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-rockchip@lists.infradead.org,
linux-staging@lists.linux.dev,
linux-arm-kernel@lists.infradead.org,
linux-sunxi@lists.linux.dev, kernel@collabora.com
Subject: Re: [PATCH v10 16/17] media: uapi: Change data_bit_offset definition
Date: Tue, 5 Jul 2022 12:56:54 -0300 [thread overview]
Message-ID: <YsRfRlQxSw0624mP@eze-laptop> (raw)
In-Reply-To: <20220705085420.272912-17-benjamin.gaignard@collabora.com>
On Tue, Jul 05, 2022 at 10:54:19AM +0200, Benjamin Gaignard wrote:
> 'F.7.3.6.1 General slice segment header syntax' section of HEVC
> specification describes that a slice header always end aligned on
> byte boundary, therefore we only need to provide the data offset in bytes.
>
> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
> Acked-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
> Tested-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Makes sense and it matches what other CODEC ABIs.
Reviewed-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Thanks,
Ezequiel
> ---
> .../media/v4l/ext-ctrls-codec.rst | 4 ++--
> .../staging/media/sunxi/cedrus/cedrus_h265.c | 19 ++++++++++++++++++-
> .../staging/media/sunxi/cedrus/cedrus_video.c | 1 -
> include/media/hevc-ctrls.h | 4 ++--
> 4 files changed, 22 insertions(+), 6 deletions(-)
>
> diff --git a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst
> index 889e2bcffde6..af5cb4e4ef73 100644
> --- a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst
> +++ b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst
> @@ -3008,8 +3008,8 @@ enum v4l2_mpeg_video_hevc_size_of_length_field -
> - ``bit_size``
> - Size (in bits) of the current slice data.
> * - __u32
> - - ``data_bit_offset``
> - - Offset (in bits) to the video data in the current slice data.
> + - ``data_byte_offset``
> + - Offset (in bytes) to the video data in the current slice data.
> * - __u32
> - ``num_entry_point_offsets``
> - Specifies the number of entry point offset syntax elements in the slice header.
> diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c
> index 411601975124..7b67cb4621cf 100644
> --- a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c
> +++ b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c
> @@ -317,6 +317,8 @@ static void cedrus_h265_setup(struct cedrus_ctx *ctx,
> u32 chroma_log2_weight_denom;
> u32 output_pic_list_index;
> u32 pic_order_cnt[2];
> + u8 *padding;
> + int count;
> u32 reg;
>
> sps = run->h265.sps;
> @@ -405,7 +407,22 @@ static void cedrus_h265_setup(struct cedrus_ctx *ctx,
> /* Initialize bitstream access. */
> cedrus_write(dev, VE_DEC_H265_TRIGGER, VE_DEC_H265_TRIGGER_INIT_SWDEC);
>
> - cedrus_h265_skip_bits(dev, slice_params->data_bit_offset);
> + /*
> + * Cedrus expects that bitstream pointer is actually at the end of the slice header
> + * instead of start of slice data. Padding is 8 bits at most (one bit set to 1 and
> + * at most seven bits set to 0), so we have to inspect only one byte before slice data.
> + */
> + padding = (u8 *)vb2_plane_vaddr(&run->src->vb2_buf, 0) +
> + slice_params->data_byte_offset - 1;
> +
> + for (count = 0; count < 8; count++)
> + if (*padding & (1 << count))
> + break;
> +
> + /* Include the one bit. */
> + count++;
> +
> + cedrus_h265_skip_bits(dev, slice_params->data_byte_offset * 8 - count);
>
> /* Bitstream parameters. */
>
> diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_video.c b/drivers/staging/media/sunxi/cedrus/cedrus_video.c
> index 33726175d980..66714609b577 100644
> --- a/drivers/staging/media/sunxi/cedrus/cedrus_video.c
> +++ b/drivers/staging/media/sunxi/cedrus/cedrus_video.c
> @@ -568,7 +568,6 @@ int cedrus_queue_init(void *priv, struct vb2_queue *src_vq,
>
> src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
> src_vq->io_modes = VB2_MMAP | VB2_DMABUF;
> - src_vq->dma_attrs = DMA_ATTR_NO_KERNEL_MAPPING;
> src_vq->drv_priv = ctx;
> src_vq->buf_struct_size = sizeof(struct cedrus_buffer);
> src_vq->ops = &cedrus_qops;
> diff --git a/include/media/hevc-ctrls.h b/include/media/hevc-ctrls.h
> index 7358cbfc3e4d..c89029b3c5da 100644
> --- a/include/media/hevc-ctrls.h
> +++ b/include/media/hevc-ctrls.h
> @@ -310,7 +310,7 @@ struct v4l2_hevc_pred_weight_table {
> * V4L2_CTRL_FLAG_DYNAMIC_ARRAY flag must be set when using it.
> *
> * @bit_size: size (in bits) of the current slice data
> - * @data_bit_offset: offset (in bits) to the video data in the current slice data
> + * @data_byte_offset: offset (in bytes) to the video data in the current slice data
> * @num_entry_point_offsets: specifies the number of entry point offset syntax
> * elements in the slice header.
> * @nal_unit_type: specifies the coding type of the slice (B, P or I)
> @@ -356,7 +356,7 @@ struct v4l2_hevc_pred_weight_table {
> */
> struct v4l2_ctrl_hevc_slice_params {
> __u32 bit_size;
> - __u32 data_bit_offset;
> + __u32 data_byte_offset;
> __u32 num_entry_point_offsets;
> /* ISO/IEC 23008-2, ITU-T Rec. H.265: NAL unit header */
> __u8 nal_unit_type;
> --
> 2.32.0
>
next prev parent reply other threads:[~2022-07-05 15:57 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-05 8:54 [PATCH v10 00/17] Move HEVC stateless controls out of staging Benjamin Gaignard
2022-07-05 8:54 ` [PATCH v10 01/17] videodev2.h: add V4L2_CTRL_FLAG_DYNAMIC_ARRAY Benjamin Gaignard
2022-07-05 8:54 ` [PATCH v10 02/17] v4l2-ctrls: add support for dynamically allocated arrays Benjamin Gaignard
2022-07-05 8:54 ` [PATCH v10 03/17] vivid: add dynamic array test control Benjamin Gaignard
2022-07-05 8:54 ` [PATCH v10 04/17] media: uapi: HEVC: Add missing fields in HEVC controls Benjamin Gaignard
2022-07-05 15:19 ` Ezequiel Garcia
2022-07-05 8:54 ` [PATCH v10 05/17] media: uapi: HEVC: Rename HEVC stateless controls with STATELESS prefix Benjamin Gaignard
2022-07-05 15:20 ` Ezequiel Garcia
2022-07-05 8:54 ` [PATCH v10 06/17] media: uapi: HEVC: Change pic_order_cnt definition in v4l2_hevc_dpb_entry Benjamin Gaignard
2022-07-05 15:21 ` Ezequiel Garcia
2022-07-05 8:54 ` [PATCH v10 07/17] media: uapi: HEVC: Add SEI pic struct flags Benjamin Gaignard
2022-07-05 15:22 ` Ezequiel Garcia
2022-07-05 8:54 ` [PATCH v10 08/17] media: uapi: HEVC: Add documentation to uAPI structure Benjamin Gaignard
2022-07-05 15:29 ` Ezequiel Garcia
2022-07-05 8:54 ` [PATCH v10 09/17] media: uapi: HEVC: Define V4L2_CID_STATELESS_HEVC_SLICE_PARAMS as a dynamic array Benjamin Gaignard
2022-07-05 15:35 ` Ezequiel Garcia
2022-07-05 8:54 ` [PATCH v10 10/17] media: uapi: Move parsed HEVC pixel format out of staging Benjamin Gaignard
2022-07-05 15:41 ` Ezequiel Garcia
2022-07-05 8:54 ` [PATCH v10 11/17] media: uapi: Add V4L2_CID_STATELESS_HEVC_ENTRY_POINT_OFFSETS control Benjamin Gaignard
2022-07-05 15:45 ` Ezequiel Garcia
2022-07-05 16:03 ` Benjamin Gaignard
2022-07-05 16:11 ` Jernej Škrabec
2022-07-06 18:39 ` Ezequiel Garcia
2022-07-06 18:49 ` Jernej Škrabec
2022-07-06 20:28 ` Benjamin Gaignard
2022-07-06 7:56 ` Hans Verkuil
2022-07-05 8:54 ` [PATCH v10 12/17] media: uapi: Move the HEVC stateless control type out of staging Benjamin Gaignard
2022-07-05 15:50 ` Ezequiel Garcia
2022-07-05 8:54 ` [PATCH v10 13/17] media: controls: Log HEVC stateless control in .std_log Benjamin Gaignard
2022-07-05 8:54 ` [PATCH v10 14/17] media: hantro: Stop using Hantro dedicated control Benjamin Gaignard
2022-07-05 15:55 ` Ezequiel Garcia
2022-07-05 8:54 ` [PATCH v10 15/17] media: uapi: HEVC: fix padding in v4l2 control structures Benjamin Gaignard
2022-07-05 8:54 ` [PATCH v10 16/17] media: uapi: Change data_bit_offset definition Benjamin Gaignard
2022-07-05 15:56 ` Ezequiel Garcia [this message]
2022-07-05 8:54 ` [PATCH v10 17/17] media: uapi: move HEVC stateless controls out of staging Benjamin Gaignard
2022-07-05 15:58 ` Ezequiel Garcia
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