Re: [PATCH 2/8] media: dt-bindings: renesas,rzg2l-csi2: Document Renesas RZ/V2H(P) SoC

[Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>]

Hi Laurent,

Thanks for your review.

On Fri, Feb 14, 2025 at 02:29:51AM +0200, Laurent Pinchart wrote:
> Hi Tommaso, Prabhakar,
> 
> Thank you for the patch.
> 
> On Mon, Feb 10, 2025 at 12:45:34PM +0100, Tommaso Merciai wrote:
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > 
> > The MIPI CSI-2 block on the Renesas RZ/V2H(P) SoC is similar to the one
> > found on the Renesas RZ/G2L SoC, with the following differences:
> > - A different D-PHY
> > - Additional registers for the MIPI CSI-2 link
> > - Only two clocks
> > 
> > Add a new compatible string, `renesas,r9a09g057-csi2`, for the RZ/V2H(P)
> > SoC.
> > 
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
> > ---
> >  .../bindings/media/renesas,rzg2l-csi2.yaml    | 63 ++++++++++++++-----
> >  1 file changed, 48 insertions(+), 15 deletions(-)
> > 
> > diff --git a/Documentation/devicetree/bindings/media/renesas,rzg2l-csi2.yaml b/Documentation/devicetree/bindings/media/renesas,rzg2l-csi2.yaml
> > index 7faa12fecd5b..0d07c55a3f35 100644
> > --- a/Documentation/devicetree/bindings/media/renesas,rzg2l-csi2.yaml
> > +++ b/Documentation/devicetree/bindings/media/renesas,rzg2l-csi2.yaml
> > @@ -17,12 +17,15 @@ description:
> >  
> >  properties:
> >    compatible:
> > -    items:
> > -      - enum:
> > -          - renesas,r9a07g043-csi2       # RZ/G2UL
> > -          - renesas,r9a07g044-csi2       # RZ/G2{L,LC}
> > -          - renesas,r9a07g054-csi2       # RZ/V2L
> > -      - const: renesas,rzg2l-csi2
> > +    oneOf:
> > +      - items:
> > +          - enum:
> > +              - renesas,r9a07g043-csi2 # RZ/G2UL
> > +              - renesas,r9a07g044-csi2 # RZ/G2{L,LC}
> > +              - renesas,r9a07g054-csi2 # RZ/V2L
> > +          - const: renesas,rzg2l-csi2
> > +
> 
> I'd drop the empty line.

I'll drop this line in v2, thanks.

> 
> > +      - const: renesas,r9a09g057-csi2 # RZ/V2H(P)
> >  
> >    reg:
> >      maxItems: 1
> > @@ -31,16 +34,24 @@ properties:
> >      maxItems: 1
> >  
> >    clocks:
> > -    items:
> > -      - description: Internal clock for connecting CRU and MIPI
> > -      - description: CRU Main clock
> > -      - description: CRU Register access clock
> > +    oneOf:
> > +      - items:
> > +          - description: Internal clock for connecting CRU and MIPI
> > +          - description: CRU Main clock
> > +          - description: CRU Register access clock
> > +      - items:
> > +          - description: CRU Main clock
> > +          - description: CRU Register access clock
> >  
> >    clock-names:
> > -    items:
> > -      - const: system
> > -      - const: video
> > -      - const: apb
> > +    oneOf:
> > +      - items:
> > +          - const: system
> > +          - const: video
> > +          - const: apb
> > +      - items:
> > +          - const: video
> > +          - const: apb
> 
> I would move the clocks and clock-names definitions to the conditional
> below. Otherwise I think a device tree that has two clocks only but
> incorrectly uses "system" and "video" instead of "video" and "apb" will
> validate.

Agreed. Taking as reference your work done on renesas,fcp.yaml.
What about the following?

  clocks: true
  clock-names: true

Then move the clocks and clock-names below as you suggested
into the conditional block:

allOf:
  - if:
      properties:
        compatible:
          contains:
            const: renesas,r9a09g057-csi2
    then:
      properties:
        clocks:
          items:
            - description: CRU Main clock
            - description: CRU Register access clock
        clock-names:
          items:
            - const: video
            - const: apb

    else:
      properties:
        clocks:
          items:
            - description: Internal clock for connecting CRU and MIPI
            - description: CRU Main clock
            - description: CRU Register access clock
        clock-names:
          items:
            - const: system
            - const: video
            - const: apb

Thanks in advance.

> 
> >  
> >    power-domains:
> >      maxItems: 1
> > @@ -48,7 +59,7 @@ properties:
> >    resets:
> >      items:
> >        - description: CRU_PRESETN reset terminal
> > -      - description: CRU_CMN_RSTB reset terminal
> > +      - description: CRU_CMN_RSTB reset terminal or D-PHY reset
> >  
> >    reset-names:
> >      items:
> > @@ -101,6 +112,28 @@ required:
> >    - reset-names
> >    - ports
> >  
> > +allOf:
> > +  - if:
> > +      properties:
> > +        compatible:
> > +          contains:
> > +            const: renesas,r9a09g057-csi2
> > +    then:
> > +      properties:
> > +        clocks:
> > +          maxItems: 2
> > +
> > +        clock-names:
> > +          maxItems: 2
> > +
> > +    else:
> > +      properties:
> > +        clocks:
> > +          maxItems: 3
> > +
> > +        clock-names:
> > +          maxItems: 3
> > +
> >  additionalProperties: false
> >  
> >  examples:
> 
> -- 
> Regards,
> 
> Laurent Pinchart

Thanks & Regards,
Tommaso