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Tue, 03 Mar 2026 10:49:07 -0800 (PST) X-Received: by 2002:a17:90b:5847:b0:340:bb64:c5e with SMTP id 98e67ed59e1d1-35965c34e76mr16015837a91.14.1772563746967; Tue, 03 Mar 2026 10:49:06 -0800 (PST) Received: from [192.168.0.172] ([49.205.248.49]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3599c4083a1sm2897718a91.6.2026.03.03.10.48.59 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 03 Mar 2026 10:49:06 -0800 (PST) Message-ID: Date: Wed, 4 Mar 2026 00:18:58 +0530 Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 6/7] media: iris: add iris4 specific H265 line buffer calculation To: Dmitry Baryshkov Cc: Dikshita Agarwal , Abhinav Kumar , Bryan O'Donoghue , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Saravana Kannan , Joerg Roedel , Will Deacon , Robin Murphy , Stefan Schmidt , Hans Verkuil , Krzysztof Kozlowski , Vishnu Reddy , Hans Verkuil , linux-arm-msm@vger.kernel.org, linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, iommu@lists.linux.dev, Bryan O'Donoghue References: <20260227-kaanapali-iris-v2-0-850043ac3933@oss.qualcomm.com> <20260227-kaanapali-iris-v2-6-850043ac3933@oss.qualcomm.com> Content-Language: en-US From: Vikash Garodia In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzAzMDE1MSBTYWx0ZWRfXwNPtg9wgDalA A0suv7rwV8DSoWZevp+hh4QkrruDdtoBjTH7dP/V4/dh1GsYCMwmhWORWeeguVJrWJCXxKzWQGJ rMN/+FxC95Pb0ArQsx0kSRmTrDlih//KEiKcKB48IEwPGA88KCloV6CtIdJDK7yeAj8anl+rV7l HC+mrxbMgRsJW+gwUuC2/DVhTM1Cl03y6vfKqjgX+iuLvukHGJd6XCSFMvSdLYLcnO2Km0/CLs7 UQUJSHOae7H02FOsRVulrUvm4IEjViv887JTsp4QAjvG7r8uXiSlDx0QXHhKH2Hsy8WX2Vih7ka UA+9g/IcmLfalPaHAgSfQOQM4ZA1XcaZFSvJRbPYyPHQCpxg3174Bp97N3cj9k41Mi+Lfa+hiJY PkV/RCxNzPG/S3y5OSVne/tvoWiKrpXXaoM41URA9JW6tHhc7atEgQ5pdd28imM7Z/SQ9zaWvUd 9sLOnhv72iIcwBda4hw== X-Authority-Analysis: v=2.4 cv=MuhfKmae c=1 sm=1 tr=0 ts=69a72d24 cx=c_pps a=RP+M6JBNLl+fLTcSJhASfg==:117 a=KPiuay1jFzAquJblYynD6w==:17 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=EUspDBNiAAAA:8 a=hv41YOXH2Fg2t9TqYk4A:9 a=QEXdDO2ut3YA:10 a=iS9zxrgQBfv6-_F4QbHw:22 X-Proofpoint-ORIG-GUID: K4laDebmi7WuBVZnoFAUJignjm1EFb8- X-Proofpoint-GUID: K4laDebmi7WuBVZnoFAUJignjm1EFb8- X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-03_02,2026-03-03_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 phishscore=0 bulkscore=0 lowpriorityscore=0 adultscore=0 impostorscore=0 suspectscore=0 malwarescore=0 clxscore=1015 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2602130000 definitions=main-2603030151 On 2/28/2026 1:58 AM, Dmitry Baryshkov wrote: > On Fri, Feb 27, 2026 at 07:41:22PM +0530, Vikash Garodia wrote: >> The H265 decoder line buffer size calculation for iris4 (VPU4) was >> previously reusing the iris3 formula. While this works for most >> resolutions, certain configurations require a larger buffer size on >> iris4, causing firmware errors during decode. This resolves firmware >> failures seen with specific test vectors on kaanapali (iris4), and fixes >> the following failing fluster tests >> - PICSIZE_C_Bossen_1 >> - WPP_E_ericsson_MAIN_2 > > This reminds me of the commit fixing SC7280 support. Should SC7280 or > all VPU2.0 platforms also use separate formula? > for vpu2, there is already a separate formula >> >> Co-developed-by: Vishnu Reddy >> Signed-off-by: Vishnu Reddy >> Signed-off-by: Vikash Garodia >> --- >> drivers/media/platform/qcom/iris/iris_vpu_buffer.c | 51 +++++++++++++++++++++- >> 1 file changed, 50 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/media/platform/qcom/iris/iris_vpu_buffer.c b/drivers/media/platform/qcom/iris/iris_vpu_buffer.c >> index 9270422c16019ba658ee8813940cb9110ad030a1..a4d599c49ce9052b609b9cedf65f669ba78b5407 100644 >> --- a/drivers/media/platform/qcom/iris/iris_vpu_buffer.c >> +++ b/drivers/media/platform/qcom/iris/iris_vpu_buffer.c >> @@ -1755,6 +1755,55 @@ static u32 hfi_vpu4x_buffer_line_vp9d(u32 frame_width, u32 frame_height, u32 _yu >> return lb_size + dpb_obp_size; >> } >> >> +static u32 hfi_vpu4x_buffer_line_h265d(u32 frame_width, u32 frame_height, bool is_opb, >> + u32 num_vpp_pipes) >> +{ >> + u32 num_lcu_per_pipe, fe_left_lb, se_left_lb, vsp_left_lb, top_lb, qp_size, >> + dpb_obp = 0, lcu_size = 16; >> + >> + num_lcu_per_pipe = (DIV_ROUND_UP(frame_height, lcu_size) / num_vpp_pipes) + >> + (DIV_ROUND_UP(frame_height, lcu_size) % num_vpp_pipes); >> + >> + fe_left_lb = ALIGN((DMA_ALIGNMENT * num_lcu_per_pipe), DMA_ALIGNMENT) * >> + FE_LFT_CTRL_LINE_NUMBERS; >> + fe_left_lb += ALIGN((DMA_ALIGNMENT * 2 * num_lcu_per_pipe), DMA_ALIGNMENT) * >> + FE_LFT_DB_DATA_LINE_NUMBERS; >> + fe_left_lb += ALIGN((DMA_ALIGNMENT * num_lcu_per_pipe), DMA_ALIGNMENT); >> + fe_left_lb += ALIGN((DMA_ALIGNMENT * 2 * num_lcu_per_pipe), DMA_ALIGNMENT); >> + fe_left_lb += ALIGN((DMA_ALIGNMENT * 8 * num_lcu_per_pipe), DMA_ALIGNMENT) * >> + FE_LFT_LR_DATA_LINE_NUMBERS; >> + >> + if (is_opb) >> + dpb_obp = size_dpb_opb(frame_height, lcu_size) * num_vpp_pipes; >> + >> + se_left_lb = max_t(u32, (ALIGN(frame_height, BUFFER_ALIGNMENT_16_BYTES) >> 3) * >> + MAX_SE_NBR_CTRL_LCU16_LINE_BUFFER_SIZE, >> + max_t(u32, (ALIGN(frame_height, BUFFER_ALIGNMENT_32_BYTES) >> 3) * >> + MAX_SE_NBR_CTRL_LCU32_LINE_BUFFER_SIZE, >> + (ALIGN(frame_height, BUFFER_ALIGNMENT_64_BYTES) >> 3) * >> + MAX_SE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE)); >> + >> + vsp_left_lb = ALIGN(DIV_ROUND_UP(frame_height, BUFFER_ALIGNMENT_64_BYTES) * >> + H265_NUM_TILE_ROW, DMA_ALIGNMENT); >> + >> + top_lb = ALIGN((DMA_ALIGNMENT * DIV_ROUND_UP(frame_width, lcu_size)), DMA_ALIGNMENT) * >> + FE_TOP_CTRL_LINE_NUMBERS; >> + top_lb += ALIGN(DMA_ALIGNMENT * 2 * DIV_ROUND_UP(frame_width, lcu_size), DMA_ALIGNMENT) * >> + FE_TOP_DATA_LUMA_LINE_NUMBERS; >> + top_lb += ALIGN(DMA_ALIGNMENT * 2 * (DIV_ROUND_UP(frame_width, lcu_size) + 1), >> + DMA_ALIGNMENT) * FE_TOP_DATA_CHROMA_LINE_NUMBERS; >> + top_lb += ALIGN(ALIGN(frame_width, BUFFER_ALIGNMENT_64_BYTES) * 2, DMA_ALIGNMENT); >> + top_lb += ALIGN(ALIGN(frame_width, BUFFER_ALIGNMENT_64_BYTES) * 6, DMA_ALIGNMENT); >> + top_lb += size_h265d_lb_vsp_top(frame_width, frame_height); >> + >> + qp_size = size_h265d_qp(frame_width, frame_height); >> + >> + return ((ALIGN(dpb_obp, DMA_ALIGNMENT) + ALIGN(se_left_lb, DMA_ALIGNMENT) + >> + ALIGN(vsp_left_lb, DMA_ALIGNMENT)) * num_vpp_pipes) + >> + ALIGN(fe_left_lb, DMA_ALIGNMENT) + ALIGN(top_lb, DMA_ALIGNMENT) + >> + ALIGN(qp_size, DMA_ALIGNMENT); >> +} >> + >> static u32 iris_vpu4x_dec_line_size(struct iris_inst *inst) >> { >> u32 num_vpp_pipes = inst->core->iris_platform_data->num_vpp_pipe; >> @@ -1770,7 +1819,7 @@ static u32 iris_vpu4x_dec_line_size(struct iris_inst *inst) >> if (inst->codec == V4L2_PIX_FMT_H264) >> return hfi_buffer_line_h264d(width, height, is_opb, num_vpp_pipes); >> else if (inst->codec == V4L2_PIX_FMT_HEVC) >> - return hfi_buffer_line_h265d(width, height, is_opb, num_vpp_pipes); >> + return hfi_vpu4x_buffer_line_h265d(width, height, is_opb, num_vpp_pipes); >> else if (inst->codec == V4L2_PIX_FMT_VP9) >> return hfi_vpu4x_buffer_line_vp9d(width, height, out_min_count, is_opb, >> num_vpp_pipes); >> >> -- >> 2.34.1 >> >