From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 03B75C433EF for ; Tue, 7 Jun 2022 09:15:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239069AbiFGJPb (ORCPT ); Tue, 7 Jun 2022 05:15:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39652 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232816AbiFGJP1 (ORCPT ); Tue, 7 Jun 2022 05:15:27 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 038EB6CAA9; Tue, 7 Jun 2022 02:15:24 -0700 (PDT) X-UUID: e707fa372a0a4e1ca19fea84f00e77f3-20220607 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.5,REQID:b23b118e-9c65-49ae-adc2-815b6a1fd2a5,OB:10,L OB:10,IP:0,URL:5,TC:0,Content:0,EDM:0,RT:0,SF:45,FILE:0,RULE:Release_Ham,A CTION:release,TS:50 X-CID-INFO: VERSION:1.1.5,REQID:b23b118e-9c65-49ae-adc2-815b6a1fd2a5,OB:10,LOB :10,IP:0,URL:5,TC:0,Content:0,EDM:0,RT:0,SF:45,FILE:0,RULE:Release_Ham,ACT ION:release,TS:50 X-CID-META: VersionHash:2a19b09,CLOUDID:2a5f777e-c8dc-403a-96e8-6237210dceee,C OID:ebc12f442421,Recheck:0,SF:28|17|19|48,TC:nil,Content:0,EDM:-3,IP:nil,U RL:1,File:nil,QS:0,BEC:nil X-UUID: e707fa372a0a4e1ca19fea84f00e77f3-20220607 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 2140958385; Tue, 07 Jun 2022 17:15:20 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Tue, 7 Jun 2022 17:15:18 +0800 Received: from mtksdccf07 (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 7 Jun 2022 17:15:18 +0800 Message-ID: Subject: Re: [PATCH v19 2/6] soc: mediatek: mutex: add 8183 MUTEX MOD settings for MDP From: CK Hu To: Moudy Ho , Mauro Carvalho Chehab , Rob Herring , Matthias Brugger , Krzysztof Kozlowski , Hans Verkuil CC: Chun-Kuang Hu , Rob Landley , Laurent Pinchart , , , , , , Alexandre Courbot , , , , , Benjamin Gaignard , AngeloGioacchino Del Regno , daoyuan huang , Ping-Hsun Wu , , , , , , , , Date: Tue, 7 Jun 2022 17:15:18 +0800 In-Reply-To: <20220531055224.19280-3-moudy.ho@mediatek.com> References: <20220531055224.19280-1-moudy.ho@mediatek.com> <20220531055224.19280-3-moudy.ho@mediatek.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Hi, Moudy: On Tue, 2022-05-31 at 13:52 +0800, Moudy Ho wrote: > For the purpose of module independence, related settings should be > moved > from MDP to the corresponding driver. > This patch adds 8183 MUTEX MOD settings for MDP. Reviewed-by: CK Hu > > Signed-off-by: Moudy Ho > Reviewed-by: AngeloGioacchino Del Regno < > angelogioacchino.delregno@collabora.com> > Reviewed-by: Rex-BC Chen > --- > drivers/soc/mediatek/mtk-mutex.c | 21 +++++++++++++++++++++ > 1 file changed, 21 insertions(+) > > diff --git a/drivers/soc/mediatek/mtk-mutex.c > b/drivers/soc/mediatek/mtk-mutex.c > index a3b054b33826..23009445adb4 100644 > --- a/drivers/soc/mediatek/mtk-mutex.c > +++ b/drivers/soc/mediatek/mtk-mutex.c > @@ -80,6 +80,15 @@ > #define MT8183_MUTEX_MOD_DISP_GAMMA0 16 > #define MT8183_MUTEX_MOD_DISP_DITHER0 17 > > +#define MT8183_MUTEX_MOD_MDP_RDMA0 2 > +#define MT8183_MUTEX_MOD_MDP_RSZ0 4 > +#define MT8183_MUTEX_MOD_MDP_RSZ1 5 > +#define MT8183_MUTEX_MOD_MDP_TDSHP0 6 > +#define MT8183_MUTEX_MOD_MDP_WROT0 7 > +#define MT8183_MUTEX_MOD_MDP_WDMA 8 > +#define MT8183_MUTEX_MOD_MDP_AAL0 23 > +#define MT8183_MUTEX_MOD_MDP_CCORR0 24 > + > #define MT8173_MUTEX_MOD_DISP_OVL0 11 > #define MT8173_MUTEX_MOD_DISP_OVL1 12 > #define MT8173_MUTEX_MOD_DISP_RDMA0 13 > @@ -273,6 +282,17 @@ static const unsigned int > mt8183_mutex_mod[DDP_COMPONENT_ID_MAX] = { > [DDP_COMPONENT_WDMA0] = MT8183_MUTEX_MOD_DISP_WDMA0, > }; > > +static const unsigned int mt8183_mutex_table_mod[MUTEX_MOD_IDX_MAX] > = { > + [MUTEX_MOD_IDX_MDP_RDMA0] = MT8183_MUTEX_MOD_MDP_RDMA0, > + [MUTEX_MOD_IDX_MDP_RSZ0] = MT8183_MUTEX_MOD_MDP_RSZ0, > + [MUTEX_MOD_IDX_MDP_RSZ1] = MT8183_MUTEX_MOD_MDP_RSZ1, > + [MUTEX_MOD_IDX_MDP_TDSHP0] = MT8183_MUTEX_MOD_MDP_TDSHP0, > + [MUTEX_MOD_IDX_MDP_WROT0] = MT8183_MUTEX_MOD_MDP_WROT0, > + [MUTEX_MOD_IDX_MDP_WDMA] = MT8183_MUTEX_MOD_MDP_WDMA, > + [MUTEX_MOD_IDX_MDP_AAL0] = MT8183_MUTEX_MOD_MDP_AAL0, > + [MUTEX_MOD_IDX_MDP_CCORR0] = MT8183_MUTEX_MOD_MDP_CCORR0, > +}; > + > static const unsigned int mt8186_mutex_mod[DDP_COMPONENT_ID_MAX] = { > [DDP_COMPONENT_AAL0] = MT8186_MUTEX_MOD_DISP_AAL0, > [DDP_COMPONENT_CCORR] = MT8186_MUTEX_MOD_DISP_CCORR0, > @@ -400,6 +420,7 @@ static const struct mtk_mutex_data > mt8183_mutex_driver_data = { > .mutex_sof = mt8183_mutex_sof, > .mutex_mod_reg = MT8183_MUTEX0_MOD0, > .mutex_sof_reg = MT8183_MUTEX0_SOF0, > + .mutex_table_mod = mt8183_mutex_table_mod, > .no_clk = true, > }; >