From: David Heidelberg <david@ixit.cz>
To: Bryan O'Donoghue <bryan.odonoghue@linaro.org>,
Robert Foss <rfoss@kernel.org>, Todor Tomov <todor.too@gmail.com>,
Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>,
Mauro Carvalho Chehab <mchehab@kernel.org>,
Luca Weiss <luca.weiss@fairphone.com>,
Petr Hodina <phodina@protonmail.com>,
Casey Connolly <casey.connolly@linaro.org>,
"Dr. Git" <drgitx@gmail.com>
Cc: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>,
Joel Selvaraj <foss@joelselvaraj.com>,
Kieran Bingham <kbingham@kernel.org>,
Sakari Ailus <sakari.ailus@linux.intel.com>,
linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-kernel@vger.kernel.org, phone-devel@vger.kernel.org
Subject: Re: [PATCH WIP v4 6/9] media: qcom: camss: csiphy-3ph: Update Gen2 v1.1 MIPI CSI-2 CPHY init
Date: Tue, 3 Mar 2026 11:00:40 +0100 [thread overview]
Message-ID: <f5038001-da33-4c44-b9f7-3f967830eec0@ixit.cz> (raw)
In-Reply-To: <4f29492f-c5c0-402c-b2aa-0e1886299d59@linaro.org>
On 03/03/2026 10:55, Bryan O'Donoghue wrote:
> On 01/03/2026 00:51, David Heidelberg via B4 Relay wrote:
>> From: David Heidelberg <david@ixit.cz>
>>
>> These values should improve C-PHY behaviour. Should match most recent
>> Qualcomm code.
>>
>> Signed-off-by: David Heidelberg <david@ixit.cz>
>> ---
>> .../media/platform/qcom/camss/camss-csiphy-3ph-1-0.c | 18 +++++++++---------
>> 1 file changed, 9 insertions(+), 9 deletions(-)
>>
>> diff --git a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c b/
>> drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c
>> index 5482fb5163e17..c612192ee727a 100644
>> --- a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c
>> +++ b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c
>> @@ -225,9 +225,9 @@ csiphy_lane_regs lane_regs_sdm845[] = {
>> /* 3 entries: 3 lanes (C-PHY) */
>> static const struct
>> csiphy_lane_regs lane_regs_sdm845_3ph[] = {
>> - {0x015c, 0x43, 0x00, CSIPHY_DEFAULT_PARAMS},
>> - {0x0168, 0xa0, 0x00, CSIPHY_DEFAULT_PARAMS},
>> - {0x016c, 0x25, 0x00, CSIPHY_DEFAULT_PARAMS},
>> + {0x015c, 0x63, 0x00, CSIPHY_DEFAULT_PARAMS},
>> + {0x0168, 0xac, 0x00, CSIPHY_DEFAULT_PARAMS},
>> + {0x016c, 0xa5, 0x00, CSIPHY_DEFAULT_PARAMS},
>> {0x0104, 0x06, 0x00, CSIPHY_DEFAULT_PARAMS},
>> {0x010c, 0x12, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
>> {0x0108, 0x00, 0x00, CSIPHY_SETTLE_CNT_HIGHER_BYTE},
>> @@ -245,9 +245,9 @@ csiphy_lane_regs lane_regs_sdm845_3ph[] = {
>> {0x0164, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
>> {0x01dc, 0x51, 0x00, CSIPHY_DEFAULT_PARAMS},
>> - {0x035c, 0x43, 0x00, CSIPHY_DEFAULT_PARAMS},
>> - {0x0368, 0xa0, 0x00, CSIPHY_DEFAULT_PARAMS},
>> - {0x036c, 0x25, 0x00, CSIPHY_DEFAULT_PARAMS},
>> + {0x035c, 0x63, 0x00, CSIPHY_DEFAULT_PARAMS},
>> + {0x0368, 0xac, 0x00, CSIPHY_DEFAULT_PARAMS},
>> + {0x036c, 0xa5, 0x00, CSIPHY_DEFAULT_PARAMS},
>> {0x0304, 0x06, 0x00, CSIPHY_DEFAULT_PARAMS},
>> {0x030c, 0x12, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
>> {0x0308, 0x00, 0x00, CSIPHY_SETTLE_CNT_HIGHER_BYTE},
>> @@ -265,9 +265,9 @@ csiphy_lane_regs lane_regs_sdm845_3ph[] = {
>> {0x0364, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
>> {0x03dc, 0x51, 0x00, CSIPHY_DEFAULT_PARAMS},
>> - {0x055c, 0x43, 0x00, CSIPHY_DEFAULT_PARAMS},
>> - {0x0568, 0xa0, 0x00, CSIPHY_DEFAULT_PARAMS},
>> - {0x056c, 0x25, 0x00, CSIPHY_DEFAULT_PARAMS},
>> + {0x055c, 0x63, 0x00, CSIPHY_DEFAULT_PARAMS},
>> + {0x0568, 0xac, 0x00, CSIPHY_DEFAULT_PARAMS},
>> + {0x056c, 0xa5, 0x00, CSIPHY_DEFAULT_PARAMS},
>> {0x0504, 0x06, 0x00, CSIPHY_DEFAULT_PARAMS},
>> {0x050c, 0x12, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
>> {0x0508, 0x00, 0x00, CSIPHY_SETTLE_CNT_HIGHER_BYTE},
>>
>
> Squash down and Co-developed-by
>
We don't have any documentation how these lanes are set. I think it's good to
see two working variants, someone may need it to demystify it one day and the
history may comes handy. Also both variants works for us.
I think it would make sense to squash it, when the magic hex gets documented,
but even with description it may be useful to see what's being tuned to get
better working C-PHY.
So I would propose intentionally keep here the "history" so someone in the
future may use it to describe these registers.
David
> ---
> bod
--
David Heidelberg
next prev parent reply other threads:[~2026-03-03 10:06 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-01 0:51 [PATCH WIP v4 0/9] media: camss: Add support for C-PHY configuration on Qualcomm platforms David Heidelberg via B4 Relay
2026-03-01 0:51 ` [PATCH WIP v4 1/9] media: qcom: camss: csiphy: Introduce PHY configuration David Heidelberg via B4 Relay
2026-03-03 9:48 ` Bryan O'Donoghue
2026-03-01 0:51 ` [PATCH WIP v4 2/9] media: qcom: camss: csiphy-3ph: Use odd bits for configuring C-PHY lanes David Heidelberg via B4 Relay
2026-03-03 9:52 ` Bryan O'Donoghue
2026-03-01 0:51 ` [PATCH WIP v4 3/9] media: qcom: camss: Prepare CSID for C-PHY support David Heidelberg via B4 Relay
2026-03-03 9:53 ` Bryan O'Donoghue
2026-03-03 20:31 ` David Heidelberg
2026-03-01 0:51 ` [PATCH WIP v4 4/9] media: qcom: camss: Initialize lanes after lane configuration is available David Heidelberg via B4 Relay
2026-03-03 9:54 ` Bryan O'Donoghue
2026-03-03 10:06 ` David Heidelberg
2026-03-03 10:10 ` Bryan O'Donoghue
2026-03-03 10:12 ` David Heidelberg
2026-03-01 0:51 ` [PATCH WIP v4 5/9] media: qcom: camss: csiphy-3ph: Add Gen2 v1.1 MIPI CSI-2 CPHY init David Heidelberg via B4 Relay
2026-03-01 0:51 ` [PATCH WIP v4 6/9] media: qcom: camss: csiphy-3ph: Update " David Heidelberg via B4 Relay
2026-03-03 9:55 ` Bryan O'Donoghue
2026-03-03 10:00 ` David Heidelberg [this message]
2026-03-03 10:08 ` Bryan O'Donoghue
2026-03-03 10:22 ` Konrad Dybcio
2026-03-03 10:27 ` David Heidelberg
2026-03-03 10:39 ` Bryan O'Donoghue
2026-03-03 10:46 ` Konrad Dybcio
2026-03-01 0:51 ` [PATCH WIP v4 7/9] media: qcom: camss: csiphy-3ph: Add Gen2 v1.2.1 MIPI CSI-2 C-PHY init David Heidelberg via B4 Relay
2026-03-03 9:56 ` Bryan O'Donoghue
2026-03-01 0:51 ` [PATCH WIP v4 8/9] media: qcom: camss: csiphy-3ph: C-PHY needs own lane configuration David Heidelberg via B4 Relay
2026-03-03 9:59 ` Bryan O'Donoghue
2026-03-01 0:51 ` [PATCH WIP v4 9/9] media: qcom: camss: Account for C-PHY when calculating link frequency David Heidelberg via B4 Relay
2026-03-03 10:07 ` Bryan O'Donoghue
2026-03-20 19:48 ` Cory Keitz
2026-03-02 18:43 ` [PATCH WIP v4 0/9] media: camss: Add support for C-PHY configuration on Qualcomm platforms Cory Keitz
2026-03-02 23:13 ` David Heidelberg
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