Re: [PATCH v9 14/14] irqchip/gic-v3-its: Preallocate VPE L1 tables

[Aneesh Kumar K.V <aneesh.kumar@kernel.org>]

Marc Zyngier <maz@kernel.org> writes:

> On Wed, 04 Nov 2026 16:45:55 +0000,
> "Aneesh Kumar K.V (Arm)" <aneesh.kumar@kernel.org> wrote:
>> 
>> VPE L1 tables are allocated from the CPU-starting callback, where sleeping is
>> not allowed.  Remove the page allocation from this atomic path.
>> 
>> Use a blocking allocation for the boot CPU and record the resulting table
>> order.  Allocate a page of that order from the sleepable CPU hotplug prepare
>> stage for each secondary CPU.  Consume the preallocated page only when the CPU
>> cannot inherit an existing redistributor or ITS table.
>> 
>> Reclaim unused preallocations after the CPU reaches the online state, and from
>> the prepare-state teardown when CPU bring-up aborts.
>
> No. The way to do it is to move the ITS probing out of the
> non-sleepable CPU hotplug path.
>
> I proposed a potential hack at [1] (which I find far more palatable
> than this proposal), but the real fix is to probe the ITSs as
> devices.
>

Could you share a bit more detail on what you have in mind?

Are you suggesting that we create a platform device for each ITS and
initialize it through the driver's probe callback, while the rest of the
GIC initialization stays in the existing early boot path?

Would that mean the main GIC is operational during early boot, while
ITS-dependent features, such as MSI delivery and direct injection, become
available after the ITS devices probe?

Is that the split you have in mind?

-aneesh