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(dynamic-2a01-0c23-c58e-b900-6079-61ec-4537-dead.c23.pool.telefonica.de. [2a01:c23:c58e:b900:6079:61ec:4537:dead]) by smtp.googlemail.com with ESMTPSA id 13-20020a170906328d00b00969f44bbef1sm2875122ejw.89.2023.05.10.22.29.23 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 10 May 2023 22:29:24 -0700 (PDT) Message-ID: <018df89a-c3d2-1bda-9966-7f06b24f87f2@gmail.com> Date: Thu, 11 May 2023 07:29:21 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.10.0 Subject: Re: [PATCH net-next 0/8] Improvements for RealTek 2.5G Ethernet PHYs To: Daniel Golle , netdev@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Andrew Lunn , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , AngeloGioacchino Del Regno References: Content-Language: en-US From: Heiner Kallweit In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230510_222927_440610_CE96671D X-CRM114-Status: GOOD ( 19.92 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org On 11.05.2023 00:53, Daniel Golle wrote: > Improve support for RealTek 2.5G Ethernet PHYs (RTL822x series). > The PHYs can operate with Clause-22 and Clause-45 MDIO. > > When using Clause-45 it is desireable to avoid rate-adapter mode and > rather have the MAC interface mode follow the PHY speed. The PHYs > support 2500Base-X for 2500M, and Cisco SGMII for 1000M/100M/10M. > > Also prepare support for proprietary RealTek HiSGMII mode which will > be needed for situations when used with RealTek switch or router SoCs > such as RTL839x or RTL93xx. > > Add support for Link Down Power Saving Mode (ALDPS) which is already > supported for older RTL821x series 1GbE PHYs. > > Make sure that link-partner advertised modes are only used if the > advertisement can be considered valid. Otherwise we are seeing > false-positives warning about downscaling eventhough higher speeds > are not actually advertised by the link partner. > > While at it, use helper function for paged operation and make sure > to use use locking for that as well. > > Changes since RFC: > * Turns out paged read used to identify the PHY needs to be hardcoded > for the simple reason that the function pointers for paged operations > have not yet been populated at this point. Hence keep open-coding it, > but use helper function and make sure it happening while the MDIO bus > mutex is locked. > > Alexander Couzens (1): > net: phy: realtek: rtl8221: allow to configure SERDES mode > > Chukun Pan (1): > net: phy: realtek: switch interface mode for RTL822x series > > Daniel Golle (6): > net: phy: realtek: use genphy_soft_reset for 2.5G PHYs > net: phy: realtek: disable SGMII in-band AN for 2.5G PHYs > net: phy: realtek: make sure paged read is protected by mutex > net: phy: realtek: use inline functions for 10GbE advertisement > net: phy: realtek: check validity of 10GbE link-partner advertisement > net: phy: realtek: setup ALDPS on RTL8221B > > drivers/net/phy/realtek.c | 161 ++++++++++++++++++++++++++++++++------ > 1 file changed, 138 insertions(+), 23 deletions(-) > Has this series been tested with RTL8125A/B to ensure that the internal PHY use case still works?