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From: "CK Hu (胡俊光)" <ck.hu@mediatek.com>
To: "robh@kernel.org" <robh@kernel.org>,
	"krzk+dt@kernel.org" <krzk+dt@kernel.org>,
	"Paul-pl Chen (陳柏霖)" <Paul-pl.Chen@mediatek.com>,
	"conor+dt@kernel.org" <conor+dt@kernel.org>,
	"AngeloGioacchino Del Regno"
	<angelogioacchino.delregno@collabora.com>,
	"chunkuang.hu@kernel.org" <chunkuang.hu@kernel.org>
Cc: "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"Xiandong Wang (王先冬)" <Xiandong.Wang@mediatek.com>,
	"Jason-JH Lin (林睿祥)" <Jason-JH.Lin@mediatek.com>,
	"Singo Chang (張興國)" <Singo.Chang@mediatek.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"dri-devel@lists.freedesktop.org"
	<dri-devel@lists.freedesktop.org>,
	Project_Global_Chrome_Upstream_Group
	<Project_Global_Chrome_Upstream_Group@mediatek.com>,
	"treapking@chromium.org" <treapking@chromium.org>,
	"Nancy Lin (林欣螢)" <Nancy.Lin@mediatek.com>,
	"linux-mediatek@lists.infradead.org"
	<linux-mediatek@lists.infradead.org>,
	"Sunny Shen (沈姍姍)" <Sunny.Shen@mediatek.com>,
	"p.zabel@pengutronix.de" <p.zabel@pengutronix.de>,
	"Sirius Wang (王皓昱)" <Sirius.Wang@mediatek.com>,
	"matthias.bgg@gmail.com" <matthias.bgg@gmail.com>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v4 11/19] drm/mediatek: Rename OVL format naming
Date: Mon, 1 Sep 2025 02:45:21 +0000	[thread overview]
Message-ID: <06e8b1c561ff54f1946cc3727e8f95420c5a337a.camel@mediatek.com> (raw)
In-Reply-To: <20250828080855.3502514-12-paul-pl.chen@mediatek.com>

On Thu, 2025-08-28 at 16:07 +0800, Paul Chen wrote:
> From: Paul-pl Chen <paul-pl.chen@mediatek.com>
> 
> Rename the OVL format naming

This patch looks good to me, but commit message is not good to me.
You should include three important things in one patch.

WHAT does this patch do: describe what does this patch do in title.
WHY this patch: describe why need this patch. I need a reason to apply this patch.
HOW to do: commit body would show how to do. HOW should be related to WHAT.

You does not show WHY need this patch.
Describe the reason why I need this patch.

Regards,
CK

> 
> Signed-off-by: Paul-pl Chen <paul-pl.chen@mediatek.com>
> ---
>  drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 32 ++++++++++++-------------
>  1 file changed, 16 insertions(+), 16 deletions(-)
> 
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> index e0236353d499..d4f096d37abc 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> @@ -101,7 +101,7 @@ static inline bool is_10bit_rgb(u32 fmt)
>  	return false;
>  }
>  
> -static const u32 mt8173_formats[] = {
> +static const u32 mt8173_ovl_formats[] = {
>  	DRM_FORMAT_XRGB8888,
>  	DRM_FORMAT_ARGB8888,
>  	DRM_FORMAT_BGRX8888,
> @@ -115,7 +115,7 @@ static const u32 mt8173_formats[] = {
>  	DRM_FORMAT_YUYV,
>  };
>  
> -static const u32 mt8195_formats[] = {
> +static const u32 mt8195_ovl_formats[] = {
>  	DRM_FORMAT_XRGB8888,
>  	DRM_FORMAT_ARGB8888,
>  	DRM_FORMAT_XRGB2101010,
> @@ -667,8 +667,8 @@ static const struct mtk_disp_ovl_data mt2701_ovl_driver_data = {
>  	.gmc_bits = 8,
>  	.layer_nr = 4,
>  	.fmt_rgb565_is_0 = false,
> -	.formats = mt8173_formats,
> -	.num_formats = ARRAY_SIZE(mt8173_formats),
> +	.formats = mt8173_ovl_formats,
> +	.num_formats = ARRAY_SIZE(mt8173_ovl_formats),
>  };
>  
>  static const struct mtk_disp_ovl_data mt8173_ovl_driver_data = {
> @@ -676,8 +676,8 @@ static const struct mtk_disp_ovl_data mt8173_ovl_driver_data = {
>  	.gmc_bits = 8,
>  	.layer_nr = 4,
>  	.fmt_rgb565_is_0 = true,
> -	.formats = mt8173_formats,
> -	.num_formats = ARRAY_SIZE(mt8173_formats),
> +	.formats = mt8173_ovl_formats,
> +	.num_formats = ARRAY_SIZE(mt8173_ovl_formats),
>  };
>  
>  static const struct mtk_disp_ovl_data mt8183_ovl_driver_data = {
> @@ -685,8 +685,8 @@ static const struct mtk_disp_ovl_data mt8183_ovl_driver_data = {
>  	.gmc_bits = 10,
>  	.layer_nr = 4,
>  	.fmt_rgb565_is_0 = true,
> -	.formats = mt8173_formats,
> -	.num_formats = ARRAY_SIZE(mt8173_formats),
> +	.formats = mt8173_ovl_formats,
> +	.num_formats = ARRAY_SIZE(mt8173_ovl_formats),
>  };
>  
>  static const struct mtk_disp_ovl_data mt8183_ovl_2l_driver_data = {
> @@ -694,8 +694,8 @@ static const struct mtk_disp_ovl_data mt8183_ovl_2l_driver_data = {
>  	.gmc_bits = 10,
>  	.layer_nr = 2,
>  	.fmt_rgb565_is_0 = true,
> -	.formats = mt8173_formats,
> -	.num_formats = ARRAY_SIZE(mt8173_formats),
> +	.formats = mt8173_ovl_formats,
> +	.num_formats = ARRAY_SIZE(mt8173_ovl_formats),
>  };
>  
>  static const struct mtk_disp_ovl_data mt8192_ovl_driver_data = {
> @@ -707,8 +707,8 @@ static const struct mtk_disp_ovl_data mt8192_ovl_driver_data = {
>  	.blend_modes = BIT(DRM_MODE_BLEND_PREMULTI) |
>  		       BIT(DRM_MODE_BLEND_COVERAGE) |
>  		       BIT(DRM_MODE_BLEND_PIXEL_NONE),
> -	.formats = mt8173_formats,
> -	.num_formats = ARRAY_SIZE(mt8173_formats),
> +	.formats = mt8173_ovl_formats,
> +	.num_formats = ARRAY_SIZE(mt8173_ovl_formats),
>  };
>  
>  static const struct mtk_disp_ovl_data mt8192_ovl_2l_driver_data = {
> @@ -720,8 +720,8 @@ static const struct mtk_disp_ovl_data mt8192_ovl_2l_driver_data = {
>  	.blend_modes = BIT(DRM_MODE_BLEND_PREMULTI) |
>  		       BIT(DRM_MODE_BLEND_COVERAGE) |
>  		       BIT(DRM_MODE_BLEND_PIXEL_NONE),
> -	.formats = mt8173_formats,
> -	.num_formats = ARRAY_SIZE(mt8173_formats),
> +	.formats = mt8173_ovl_formats,
> +	.num_formats = ARRAY_SIZE(mt8173_ovl_formats),
>  };
>  
>  static const struct mtk_disp_ovl_data mt8195_ovl_driver_data = {
> @@ -734,8 +734,8 @@ static const struct mtk_disp_ovl_data mt8195_ovl_driver_data = {
>  	.blend_modes = BIT(DRM_MODE_BLEND_PREMULTI) |
>  		       BIT(DRM_MODE_BLEND_COVERAGE) |
>  		       BIT(DRM_MODE_BLEND_PIXEL_NONE),
> -	.formats = mt8195_formats,
> -	.num_formats = ARRAY_SIZE(mt8195_formats),
> +	.formats = mt8195_ovl_formats,
> +	.num_formats = ARRAY_SIZE(mt8195_ovl_formats),
>  	.supports_clrfmt_ext = true,
>  };
>  


  reply	other threads:[~2025-09-01  2:48 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-08-28  8:06 [PATCH v4 00/19] Add MediaTek SoC DRM support for MT8196 Paul Chen
2025-08-28  8:06 ` [PATCH v4 01/19] dt-bindings: arm: mediatek: mmsys: add compatible " Paul Chen
2025-08-28  8:06 ` [PATCH v4 02/19] dt-bindings: soc: mediatek: add mutex yaml " Paul Chen
2025-08-28  8:06 ` [PATCH v4 03/19] dt-bindings: display: mediatek: add EXDMA " Paul Chen
2025-08-28 13:30   ` Rob Herring (Arm)
2025-08-29  6:35   ` Krzysztof Kozlowski
2025-08-29  6:48     ` Krzysztof Kozlowski
2025-08-29 11:10       ` Paul-pl Chen (陳柏霖)
2025-08-28  8:06 ` [PATCH v4 04/19] dt-bindings: display: mediatek: add BLENDER " Paul Chen
2025-08-28  8:07 ` [PATCH v4 05/19] dt-bindings: display: mediatek: add OUTPROC " Paul Chen
2025-08-29  6:49   ` Krzysztof Kozlowski
2025-08-28  8:07 ` [PATCH v4 06/19] soc: mediatek: Add runtime PM and top clocks and async controls for MMSYS Paul Chen
2025-08-28  8:07 ` [PATCH v4 07/19] soc: mediatek: add mmsys support for MT8196 Paul Chen
2025-08-28  8:07 ` [PATCH v4 08/19] soc: mediatek: mutex: Reused the switch case for SOF ID Paul Chen
2025-08-28  8:07 ` [PATCH v4 09/19] soc: mediatek: mutex: refactor SOF settings for output components Paul Chen
2025-08-28  8:07 ` [PATCH v4 10/19] soc: mediatek: mutex: add mutex support for MT8196 Paul Chen
2025-08-28  8:07 ` [PATCH v4 11/19] drm/mediatek: Rename OVL format naming Paul Chen
2025-09-01  2:45   ` CK Hu (胡俊光) [this message]
2025-08-28  8:07 ` [PATCH v4 12/19] drm/mediatek: Export OVL formats definitions and format conversion API Paul Chen
2025-08-28  8:07 ` [PATCH v4 13/19] drm/mediatek: Export OVL Blend function Paul Chen
2025-08-28  8:07 ` [PATCH v4 14/19] drm/mediatek: add EXDMA support for MT8196 Paul Chen
2025-08-28  8:07 ` [PATCH v4 15/19] drm/mediatek: add BLENDER " Paul Chen
2025-08-28  8:07 ` [PATCH v4 16/19] drm/mediatek: add OUTPROC " Paul Chen
2025-08-28  8:07 ` [PATCH v4 17/19] drm/mediatek: add ovlsys_adaptor " Paul Chen
2025-08-28  8:07 ` [PATCH v4 18/19] drm/mediatek: Add support for multiple mmsys in the one mediatek-drm driver Paul Chen
2025-08-28  8:07 ` [PATCH v4 19/19] drm/mediatek: Add support for MT8196 multiple mmsys Paul Chen
2025-08-29  6:32 ` [PATCH v4 00/19] Add MediaTek SoC DRM support for MT8196 Krzysztof Kozlowski

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