From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sascha Hauer Subject: [PATCH 1/4] ARM: dts: mediatek: Enable clock support for Mediatek MT8135. Date: Thu, 23 Apr 2015 11:21:12 +0200 Message-ID: <1429780875-29096-2-git-send-email-s.hauer@pengutronix.de> References: <1429780875-29096-1-git-send-email-s.hauer@pengutronix.de> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1429780875-29096-1-git-send-email-s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+glpam-linux-mediatek=m.gmane.org-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org Cc: James Liao , Sascha Hauer , Henry Chen , linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, kernel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org, Matthias Brugger List-Id: linux-mediatek@lists.infradead.org From: James Liao This patch adds MT8135 clock controllers into device tree. Signed-off-by: James Liao Signed-off-by: Henry Chen Signed-off-by: Sascha Hauer --- arch/arm/boot/dts/mt8135.dtsi | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/arch/arm/boot/dts/mt8135.dtsi b/arch/arm/boot/dts/mt8135.dtsi index a161e99..b4017e2 100644 --- a/arch/arm/boot/dts/mt8135.dtsi +++ b/arch/arm/boot/dts/mt8135.dtsi @@ -12,6 +12,7 @@ * GNU General Public License for more details. */ +#include #include #include #include "skeleton64.dtsi" @@ -93,6 +94,11 @@ #clock-cells = <0>; }; + clk26m: clk26m { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <26000000>; + }; }; soc { @@ -101,6 +107,26 @@ compatible = "simple-bus"; ranges; + topckgen: topckgen@10000000 { + compatible = "mediatek,mt8135-topckgen"; + reg = <0 0x10000000 0 0x1000>; + #clock-cells = <1>; + }; + + infracfg: infracfg@10001000 { + #reset-cells = <1>; + #clock-cells = <1>; + compatible = "mediatek,mt8135-infracfg", "syscon"; + reg = <0 0x10001000 0 0x1000>; + }; + + pericfg: pericfg@10003000 { + #reset-cells = <1>; + #clock-cells = <1>; + compatible = "mediatek,mt8135-pericfg", "syscon"; + reg = <0 0x10003000 0 0x1000>; + }; + timer: timer@10008000 { compatible = "mediatek,mt8135-timer", "mediatek,mt6577-timer"; @@ -119,6 +145,12 @@ reg = <0 0x10200030 0 0x1c>; }; + apmixedsys: apmixedsys@10209000 { + compatible = "mediatek,mt8135-apmixedsys"; + reg = <0 0x10209000 0 0x1000>; + #clock-cells = <1>; + }; + gic: interrupt-controller@10211000 { compatible = "arm,cortex-a15-gic"; interrupt-controller; -- 2.1.4