From mboxrd@z Thu Jan 1 00:00:00 1970 From: Scott Shu Subject: [PATCH 6/6] ARM: dts: mt6580: enable basic SMP bringup for mt6580 Date: Thu, 18 Jun 2015 10:46:27 +0800 Message-ID: <1434595587-25466-7-git-send-email-scott.shu@mediatek.com> References: <1434595587-25466-1-git-send-email-scott.shu@mediatek.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1434595587-25466-1-git-send-email-scott.shu-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+glpam-linux-mediatek=m.gmane.org-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org To: yingjoe.chen-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org Cc: scott.shu-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, jades.shih-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org, srv_wsdupstream-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org, Miles.Chen-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org, Mars.Cheng-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org, MY.Chuang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org, Scott Shu List-Id: linux-mediatek@lists.infradead.org Add arch timer node to enable arch-timer support. MT6580 firmware doesn't correctly setup arch-timer frequency and CNTVOFF, add properties to workaround this. This set cpu enable-method to enable SMP. --- arch/arm/boot/dts/mt6580.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm/boot/dts/mt6580.dtsi b/arch/arm/boot/dts/mt6580.dtsi index a974830..a7071b38 100644 --- a/arch/arm/boot/dts/mt6580.dtsi +++ b/arch/arm/boot/dts/mt6580.dtsi @@ -23,26 +23,31 @@ cpus { #address-cells = <1>; #size-cells = <0>; + enable-method = "mediatek,mt6580-smp"; cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a7"; reg = <0x0>; + clock-frequency = <1700000000>; }; cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a7"; reg = <0x1>; + clock-frequency = <1700000000>; }; cpu@2 { device_type = "cpu"; compatible = "arm,cortex-a7"; reg = <0x2>; + clock-frequency = <1700000000>; }; cpu@3 { device_type = "cpu"; compatible = "arm,cortex-a7"; reg = <0x3>; + clock-frequency = <1700000000>; }; }; @@ -72,6 +77,21 @@ }; }; + timer { + compatible = "arm,armv7-timer"; + interrupt-parent = <&gic>; + interrupts = , + , + , + ; + clock-frequency = <13000000>; + arm,cpu-registers-not-fw-configured; + }; + soc { #address-cells = <1>; #size-cells = <1>; -- 1.8.1.1.dirty