From: xiaolei li <xiaolei.li-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
To: Boris Brezillon
<boris.brezillon-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org>
Cc: richard-/L3Ra7n9ekc@public.gmane.org,
linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
srv_heupstream-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org,
linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: Re: [PATCH 3/8] mtd: rawnand: mtk: Add DT property mtk,fdm-ecc-size
Date: Thu, 12 Apr 2018 13:36:52 +0800 [thread overview]
Message-ID: <1523511412.14673.21.camel@mhfsdcap03> (raw)
In-Reply-To: <20180411211308.436d19c0@bbrezillon>
Hi Boris,
On Wed, 2018-04-11 at 21:13 +0200, Boris Brezillon wrote:
> On Wed, 11 Apr 2018 11:41:53 +0800
> Xiaolei Li <xiaolei.li-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org> wrote:
>
> > For some MTK NAND chips, BootROM may access more than one byte
> > ECC protected FDM data, but now we fix ECC protected FDM byte as 1.
> > This will make some chips be failed to boot up.
> >
> > With this DT property setting, different MTK NAND chips with the same
> > NAND controller IP can work well.
> >
> > Signed-off-by: Xiaolei Li <xiaolei.li-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
> > ---
> > Documentation/devicetree/bindings/mtd/mtk-nand.txt | 6 ++++++
> > drivers/mtd/nand/raw/mtk_nand.c | 25 ++++++++++++++++------
> > 2 files changed, 24 insertions(+), 7 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/mtd/mtk-nand.txt b/Documentation/devicetree/bindings/mtd/mtk-nand.txt
> > index ef786568..a8e4136 100644
> > --- a/Documentation/devicetree/bindings/mtd/mtk-nand.txt
> > +++ b/Documentation/devicetree/bindings/mtd/mtk-nand.txt
> > @@ -47,6 +47,12 @@ Children nodes properties:
> > - reg: Chip Select Signal, default 0.
> > Set as reg = <0>, <1> when need 2 CS.
> > Optional:
> > +- mtk,fdm-ecc-size: Integer representing ECC protected FDM bytes.
> > + Should be in the range [1,8], if not present 1.
> > + On some MTK NAND chips, BootROM may access more than
> > + one byte ECC protected FDM data. Different MTK chips
> > + with the same NAND controller IP will work well with
> > + this properity setting.
>
> Is this something that changes on a per-SoC basis, or can a specific
> SoC have a different behavior depending on the version of the BootROM
> it embeds (that would be quite tricky to deal with since that would
> mean having different dts if you start using newer revisions of the same
> SoC).
>
> If it's on a per-SoC basis, I'd recommend defining new compatibles
> instead of adding this property.
>
Thanks for your advice. I will change to add new compatibles for this
setting next patch.
Thanks,
Xiaolei
>
prev parent reply other threads:[~2018-04-12 5:36 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1523418118-57686-1-git-send-email-xiaolei.li@mediatek.com>
2018-04-11 3:41 ` [PATCH 5/8] mtd: rawnand: Modify ->calc_ecc_bytes() hook in nand_ecc_caps Xiaolei Li
[not found] ` <1523418118-57686-6-git-send-email-xiaolei.li-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
2018-04-11 18:57 ` Boris Brezillon
2018-04-12 5:44 ` xiaolei li
2018-04-11 3:41 ` [PATCH 8/8] mtd: rawnand: mtk: Use generic helpers to calculate ecc size and strength Xiaolei Li
[not found] ` <1523418118-57686-9-git-send-email-xiaolei.li-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
2018-04-11 19:05 ` Boris Brezillon
2018-04-12 5:43 ` xiaolei li
[not found] ` <1523418118-57686-4-git-send-email-xiaolei.li@mediatek.com>
[not found] ` <1523418118-57686-4-git-send-email-xiaolei.li-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
2018-04-11 19:13 ` [PATCH 3/8] mtd: rawnand: mtk: Add DT property mtk,fdm-ecc-size Boris Brezillon
2018-04-12 5:36 ` xiaolei li [this message]
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