From mboxrd@z Thu Jan 1 00:00:00 1970 From: CK Hu Subject: Re: [PATCH v3 04/12] drm/mediatek: add clock factor for different IC Date: Fri, 21 Sep 2018 17:03:49 +0800 Message-ID: <1537520629.20660.3.camel@mtksdaap41> References: <20180921032822.30771-1-bibby.hsieh@mediatek.com> <20180921032822.30771-5-bibby.hsieh@mediatek.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <20180921032822.30771-5-bibby.hsieh@mediatek.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Bibby Hsieh Cc: linux-kernel@vger.kernel.org, Sascha Hauer , chunhui dai , David Airlie , Daniel Vetter , Cawa Cheng , dri-devel@lists.freedesktop.org, Mao Huang , Thierry Reding , linux-mediatek@lists.infradead.org, Matthias Brugger , Yingjoe Chen , linux-arm-kernel@lists.infradead.org List-Id: linux-mediatek@lists.infradead.org SGksIEJpYmJ5OgoKT24gRnJpLCAyMDE4LTA5LTIxIGF0IDExOjI4ICswODAwLCBCaWJieSBIc2ll aCB3cm90ZToKPiBGcm9tOiBjaHVuaHVpIGRhaSA8Y2h1bmh1aS5kYWlAbWVkaWF0ZWsuY29tPgo+ IAo+IGRpZmZlcmVudCBJQyBoYXMgZGlmZmVyZW50IGNsb2NrIGRlc2lnbmVkIGluIEhETUksIHRo ZSBmYWN0b3IgZm9yCj4gY2FsY3VsYXRlIGNsb2NrIHNob3VsZCBiZSBkaWZmZXJlbnQuIFVzaW5u ZyB0aGUgZGF0YSBpbiBvZl9ub2RlCj4gdG8gZmluZCB0aGlzIGZhY3Rvci4KPiAKClJldmlld2Vk LWJ5OiBDSyBIdSA8Y2suaHVAbWVkaWF0ZWsuY29tPgoKPiBTaWduZWQtb2ZmLWJ5OiBjaHVuaHVp IGRhaSA8Y2h1bmh1aS5kYWlAbWVkaWF0ZWsuY29tPgo+IC0tLQo+ICBkcml2ZXJzL2dwdS9kcm0v bWVkaWF0ZWsvbXRrX2RwaS5jIHwgMjQgKysrKysrKysrKysrKysrLS0tLS0tLS0tCj4gIDEgZmls ZSBjaGFuZ2VkLCAxNSBpbnNlcnRpb25zKCspLCA5IGRlbGV0aW9ucygtKQo+IAo+IGRpZmYgLS1n aXQgYS9kcml2ZXJzL2dwdS9kcm0vbWVkaWF0ZWsvbXRrX2RwaS5jIGIvZHJpdmVycy9ncHUvZHJt L21lZGlhdGVrL210a19kcGkuYwo+IGluZGV4IDFlNzM2OWUwZDkxYy4uMDIyY2NlYzQ5Y2VhIDEw MDY0NAo+IC0tLSBhL2RyaXZlcnMvZ3B1L2RybS9tZWRpYXRlay9tdGtfZHBpLmMKPiArKysgYi9k cml2ZXJzL2dwdS9kcm0vbWVkaWF0ZWsvbXRrX2RwaS5jCj4gQEAgLTEyMCw2ICsxMjAsNyBAQCBz dHJ1Y3QgbXRrX2RwaV95Y19saW1pdCB7Cj4gIH07Cj4gIAo+ICBzdHJ1Y3QgbXRrX2RwaV9jb25m IHsKPiArCXVuc2lnbmVkIGludCAoKmNhbF9mYWN0b3IpKGludCBjbG9jayk7Cj4gIAl1MzIgcmVn X2hfZnJlX2NvbjsKPiAgCWJvb2wgZWRnZV9zZWxfZW47Cj4gIH07Cj4gQEAgLTQ2MCwxNSArNDYx LDcgQEAgc3RhdGljIGludCBtdGtfZHBpX3NldF9kaXNwbGF5X21vZGUoc3RydWN0IG10a19kcGkg KmRwaSwKPiAgCXVuc2lnbmVkIGludCBmYWN0b3I7Cj4gIAo+ICAJLyogbGV0IHBsbF9yYXRlIGNh biBmaXggdGhlIHZhbGlkIHJhbmdlIG9mIHR2ZHBsbCAoMUd+MkdIeikgKi8KPiAtCj4gLQlpZiAo bW9kZS0+Y2xvY2sgPD0gMjcwMDApCj4gLQkJZmFjdG9yID0gMyA8PCA0Owo+IC0JZWxzZSBpZiAo bW9kZS0+Y2xvY2sgPD0gODQwMDApCj4gLQkJZmFjdG9yID0gMyA8PCAzOwo+IC0JZWxzZSBpZiAo bW9kZS0+Y2xvY2sgPD0gMTY3MDAwKQo+IC0JCWZhY3RvciA9IDMgPDwgMjsKPiAtCWVsc2UKPiAt CQlmYWN0b3IgPSAzIDw8IDE7Cj4gKwlmYWN0b3IgPSBkcGktPmNvbmYtPmNhbF9mYWN0b3IobW9k ZS0+Y2xvY2spOwo+ICAJZHJtX2Rpc3BsYXlfbW9kZV90b192aWRlb21vZGUobW9kZSwgJnZtKTsK PiAgCXBsbF9yYXRlID0gdm0ucGl4ZWxjbG9jayAqIGZhY3RvcjsKPiAgCj4gQEAgLTY4Miw3ICs2 NzUsMjAgQEAgc3RhdGljIGNvbnN0IHN0cnVjdCBjb21wb25lbnRfb3BzIG10a19kcGlfY29tcG9u ZW50X29wcyA9IHsKPiAgCS51bmJpbmQgPSBtdGtfZHBpX3VuYmluZCwKPiAgfTsKPiAgCj4gK3N0 YXRpYyB1bnNpZ25lZCBpbnQgbXQ4MTczX2NhbGN1bGF0ZV9mYWN0b3IoaW50IGNsb2NrKQo+ICt7 Cj4gKwlpZiAoY2xvY2sgPD0gMjcwMDApCj4gKwkJcmV0dXJuIDMgPDwgNDsKPiArCWVsc2UgaWYg KGNsb2NrIDw9IDg0MDAwKQo+ICsJCXJldHVybiAzIDw8IDM7Cj4gKwllbHNlIGlmIChjbG9jayA8 PSAxNjcwMDApCj4gKwkJcmV0dXJuIDMgPDwgMjsKPiArCWVsc2UKPiArCQlyZXR1cm4gMyA8PCAx Owo+ICt9Cj4gKwo+ICBzdGF0aWMgY29uc3Qgc3RydWN0IG10a19kcGlfY29uZiBtdDgxNzNfY29u ZiA9IHsKPiArCS5jYWxfZmFjdG9yID0gbXQ4MTczX2NhbGN1bGF0ZV9mYWN0b3IsCj4gIAkucmVn X2hfZnJlX2NvbiA9IDB4ZTAsCj4gIH07Cj4gIAoKCl9fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fCmRyaS1kZXZlbCBtYWlsaW5nIGxpc3QKZHJpLWRldmVsQGxp c3RzLmZyZWVkZXNrdG9wLm9yZwpodHRwczovL2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFu L2xpc3RpbmZvL2RyaS1kZXZlbAo=