From mboxrd@z Thu Jan 1 00:00:00 1970 From: Biao Huang Subject: [v2, PATCH 0/4] fix some bugs in stmmac Date: Tue, 14 May 2019 10:28:49 +0800 Message-ID: <1557800933-30759-1-git-send-email-biao.huang@mediatek.com> Mime-Version: 1.0 Content-Type: text/plain Return-path: Sender: linux-kernel-owner@vger.kernel.org To: Jose Abreu , davem@davemloft.net Cc: Giuseppe Cavallaro , Alexandre Torgue , Maxime Coquelin , Matthias Brugger , netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, yt.shen@mediatek.com, biao.huang@mediatek.com, jianguo.zhang@mediatek.com List-Id: linux-mediatek@lists.infradead.org changes in v2: 1. update rx_tail_addr as Jose's comment 2. changes clk_csr condition as Alex's proposition 3. remove init lines in dwmac-mediatek, get clk_csr from dts instead. v1: This series fix some bugs in stmmac driver 3 patches are for common stmmac or dwmac4: 1. update rx tail pointer to fix rx dma hang issue. 2. change condition for mdc clock to fix csr_clk can't be zero issue. 3. write the modified value back to MTL_OPERATION_MODE. 1 patch is for dwmac-mediatek: modify csr_clk value to fix mdio read/write fail issue for dwmac-mediatek Biao Huang (4): net: stmmac: update rx tail pointer register to fix rx dma hang issue. net: stmmac: fix csr_clk can't be zero issue net: stmmac: write the modified value back to MTL_OPERATION_MODE net: stmmac: dwmac-mediatek: modify csr_clk value to fix mdio read/write fail .../net/ethernet/stmicro/stmmac/dwmac-mediatek.c | 2 -- drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c | 2 ++ drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 7 ++++--- .../net/ethernet/stmicro/stmmac/stmmac_platform.c | 5 ++++- 4 files changed, 10 insertions(+), 6 deletions(-) -- 1.7.9.5