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From: CK Hu <ck.hu@mediatek.com>
To: Jitao Shi <jitao.shi@mediatek.com>
Cc: srv_heupstream@mediatek.com, David Airlie <airlied@linux.ie>,
	stonea168@163.com, cawa.cheng@mediatek.com,
	dri-devel@lists.freedesktop.org, sj.huang@mediatek.com,
	linux-mediatek@lists.infradead.org,
	Matthias Brugger <matthias.bgg@gmail.com>,
	yingjoe.chen@mediatek.com, eddie.huang@mediatek.com
Subject: Re: [PATCH v7 0/9] Support dsi for mt8183
Date: Fri, 27 Sep 2019 09:35:56 +0800	[thread overview]
Message-ID: <1569548156.24127.8.camel@mtksdaap41> (raw)
In-Reply-To: <20190919065806.111016-1-jitao.shi@mediatek.com>

Hi, Jitao:

For this series, applied to mediatek-drm-next-5.5 [1], thanks.

[1]
https://github.com/ckhu-mediatek/linux.git-tags/commits/mediatek-drm-next-5.5

Regards,
CK

On Thu, 2019-09-19 at 14:57 +0800, Jitao Shi wrote:
> Changes since v6:
>  - add dphy reset to avoid dphy fifo error after lines number setting
>  - separate dsi cmd reg setting from "fixes CMDQ reg address of mt8173
>    is different with mt2701"
> 
> Changes since v5:
>  - fine tune dphy timing.
> 
> Changes since v4:
>  - move mipi_dsi_host_unregiter() to .remove()
>  - fine tune add frame size control coding style
>  - change the data type of data_rate as u32, and add DIV_ROUND_UP_ULL
>  - use div_u64 when 8000000000ULL / dsi->data_rate.
> 
> Changes since v3
>  - add one more 'tab' for bitwise define.
>  - add Tested-by: Ryan Case <ryandcase@chromium.org>
> 	and Reviewed-by: CK Hu <ck.hu@mediatek.com>.
>  - remove compare da_hs_zero to da_hs_prepare.
> 
> Changes since v2:
>  - change the video timing calc method
>  - fine the dsi and mipitx init sequence
>  - fine tune commit msg
> 
> Changes since v1:
>  - separate frame size and reg commit control independent patches.
>  - fix some return values in probe
>  - remove DSI_CMDW0 in "CMDQ reg address of mt8173 is different with mt2701" 
> 
> Jitao Shi (9):
>   drm/mediatek: move mipi_dsi_host_register to probe
>   drm/mediatek: fixes CMDQ reg address of mt8173 is different with
>     mt2701
>   drm/mediatek: replace writeb() with mtk_dsi_mask()
>   drm/mediatek: add dsi reg commit disable control
>   drm/mediatek: add frame size control
>   drm/mediatek: add mt8183 dsi driver support
>   drm/mediatek: change the dsi phytiming calculate method
>   drm: mediatek: adjust dsi and mipi_tx probe sequence
>   drm/mediatek: add dphy reset after setting lanes number
> 
>  drivers/gpu/drm/mediatek/mtk_drm_drv.c |   2 +-
>  drivers/gpu/drm/mediatek/mtk_dsi.c     | 233 ++++++++++++++++++-------
>  2 files changed, 170 insertions(+), 65 deletions(-)
> 


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      parent reply	other threads:[~2019-09-27  1:35 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-09-19  6:57 [PATCH v7 0/9] Support dsi for mt8183 Jitao Shi
2019-09-19  6:57 ` [PATCH v7 1/9] drm/mediatek: move mipi_dsi_host_register to probe Jitao Shi
2019-09-19  6:57 ` [PATCH v7 2/9] drm/mediatek: fixes CMDQ reg address of mt8173 is different with mt2701 Jitao Shi
2019-09-26  8:50   ` CK Hu
2019-09-19  6:58 ` [PATCH v7 3/9] drm/mediatek: replace writeb() with mtk_dsi_mask() Jitao Shi
2019-09-26  8:50   ` CK Hu
2019-09-19  6:58 ` [PATCH v7 4/9] drm/mediatek: add dsi reg commit disable control Jitao Shi
2019-09-19  6:58 ` [PATCH v7 5/9] drm/mediatek: add frame size control Jitao Shi
2019-09-19  6:58 ` [PATCH v7 6/9] drm/mediatek: add mt8183 dsi driver support Jitao Shi
2019-09-19  6:58 ` [PATCH v7 7/9] drm/mediatek: change the dsi phytiming calculate method Jitao Shi
2019-09-26  8:51   ` CK Hu
2019-12-12 13:53     ` Enric Balletbo Serra
2019-12-12 22:47       ` Ryan Case
2019-12-13  2:45         ` CK Hu
2019-09-19  6:58 ` [PATCH v7 8/9] drm: mediatek: adjust dsi and mipi_tx probe sequence Jitao Shi
2019-09-19  6:58 ` [PATCH v7 9/9] drm/mediatek: add dphy reset after setting lanes number Jitao Shi
2019-09-26  8:52   ` CK Hu
2019-09-27  1:35 ` CK Hu [this message]

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