Re: [PATCH v3 3/7] iommu/mediatek: Disable STANDARD_AXI_MODE in MISC_CTRL

From: chao hao <Chao.Hao@mediatek.com>
To: Yong Wu <yong.wu@mediatek.com>
Cc: devicetree@vger.kernel.org, FY Yang <fy.yang@mediatek.com>,
	wsd_upstream@mediatek.com, Joerg Roedel <joro@8bytes.org>,
	linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org,
	Rob Herring <robh+dt@kernel.org>,
	linux-mediatek@lists.infradead.org,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Jun Yan <jun.yan@mediatek.com>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 3/7] iommu/mediatek: Disable STANDARD_AXI_MODE in MISC_CTRL
Date: Tue, 16 Jun 2020 14:10:11 +0800	[thread overview]
Message-ID: <1592287811.29899.3.camel@mbjsdccf07> (raw)
In-Reply-To: <1590387275.13912.7.camel@mhfsdcap03>

On Mon, 2020-05-25 at 14:14 +0800, Yong Wu wrote:
> On Sat, 2020-05-09 at 16:36 +0800, Chao Hao wrote:
> > In order to improve performance, we always disable STANDARD_AXI_MODE in
> > MISC_CTRL.
> > 
> > Signed-off-by: Chao Hao <chao.hao@mediatek.com>
> > ---
> >  drivers/iommu/mtk_iommu.c | 8 +++++++-
> >  drivers/iommu/mtk_iommu.h | 1 +
> >  2 files changed, 8 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
> > index e7e7c7695ed1..9ede327a418d 100644
> > --- a/drivers/iommu/mtk_iommu.c
> > +++ b/drivers/iommu/mtk_iommu.c
> > @@ -42,6 +42,8 @@
> >  #define F_INVLD_EN1				BIT(1)
> >  
> >  #define REG_MMU_MISC_CTRL			0x048
> > +#define F_MMU_STANDARD_AXI_MODE_BIT		(BIT(3) | BIT(19))
> > +
> >  #define REG_MMU_DCM_DIS				0x050
> >  
> >  #define REG_MMU_CTRL_REG			0x110
> > @@ -585,7 +587,11 @@ static int mtk_iommu_hw_init(const struct mtk_iommu_data *data)
> >  	}
> >  	writel_relaxed(0, data->base + REG_MMU_DCM_DIS);
> >  
> > -	if (data->plat_data->reset_axi) {
> > +	if (data->plat_data->has_misc_ctrl) {
> > +		regval = readl_relaxed(data->base + REG_MMU_MISC_CTRL);
> > +		regval &= ~F_MMU_STANDARD_AXI_MODE_BIT;
> > +		writel_relaxed(regval, data->base + REG_MMU_MISC_CTRL);
> > +	} else if (data->plat_data->reset_axi) {
> >  		/* The register is called STANDARD_AXI_MODE in this case */
> >  		writel_relaxed(0, data->base + REG_MMU_MISC_CTRL);
> >  	}
> 
> 
> 0x48 is either STANDARD_AXI_MODE or MISC_CTRL.
> 
> Thus, 
> 
> if (data->plat_data->reset_axi) {
>    xxx
> } else {  /* MISC_CTRL */
>    xxx
> }
> 
> No need add "has_misc_ctrl".

Thanks for you comment.
Only mm_iommu/m4u needs to set MISC_CTRL register and apu_iommu don't
need to set it. So I think we need to use has_misc_ctrl to distinguish
it.

> 
> > diff --git a/drivers/iommu/mtk_iommu.h b/drivers/iommu/mtk_iommu.h
> > index 1b6ea839b92c..d711ac630037 100644
> > --- a/drivers/iommu/mtk_iommu.h
> > +++ b/drivers/iommu/mtk_iommu.h
> > @@ -40,6 +40,7 @@ struct mtk_iommu_plat_data {
> >  
> >  	/* HW will use the EMI clock if there isn't the "bclk". */
> >  	bool                has_bclk;
> > +	bool		    has_misc_ctrl;
> >  	bool                has_vld_pa_rng;
> >  	bool                reset_axi;
> >  	unsigned char       larbid_remap[MTK_LARB_NR_MAX];
> 
> 

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