From: Chunfeng Yun <chunfeng.yun@mediatek.com>
To: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Bharat Gooty <bharat.gooty@broadcom.com>,
Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>,
linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
Rikard Falkeborn <rikard.falkeborn@gmail.com>,
Bjorn Andersson <bjorn.andersson@linaro.org>,
Chunfeng Yun <chunfeng.yun@mediatek.com>,
Vinod Koul <vkoul@kernel.org>, Andy Gross <agross@kernel.org>,
linux-mediatek@lists.infradead.org,
Matthias Brugger <matthias.bgg@gmail.com>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH 6/6] phy: phy-pxa-28nm-usb2: convert to readl_poll_timeout()
Date: Tue, 25 Aug 2020 10:03:07 +0800 [thread overview]
Message-ID: <1598320987-25518-6-git-send-email-chunfeng.yun@mediatek.com> (raw)
In-Reply-To: <1598320987-25518-1-git-send-email-chunfeng.yun@mediatek.com>
Use readl_poll_timeout() to simplify code
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
---
drivers/phy/marvell/phy-pxa-28nm-usb2.c | 33 +++++++++++++++------------------
1 file changed, 15 insertions(+), 18 deletions(-)
diff --git a/drivers/phy/marvell/phy-pxa-28nm-usb2.c b/drivers/phy/marvell/phy-pxa-28nm-usb2.c
index 9fd8817..a175ae9 100644
--- a/drivers/phy/marvell/phy-pxa-28nm-usb2.c
+++ b/drivers/phy/marvell/phy-pxa-28nm-usb2.c
@@ -13,6 +13,7 @@
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/io.h>
+#include <linux/iopoll.h>
#include <linux/err.h>
#include <linux/clk.h>
#include <linux/module.h>
@@ -138,15 +139,12 @@ struct mv_usb2_phy {
struct clk *clk;
};
-static bool wait_for_reg(void __iomem *reg, u32 mask, unsigned long timeout)
+static int wait_for_reg(void __iomem *reg, u32 mask, u32 ms)
{
- timeout += jiffies;
- while (time_is_after_eq_jiffies(timeout)) {
- if ((readl(reg) & mask) == mask)
- return true;
- msleep(1);
- }
- return false;
+ u32 val;
+
+ return readl_poll_timeout(reg, val, ((val & mask) == mask),
+ 1000, 1000 * ms);
}
static int mv_usb2_phy_28nm_init(struct phy *phy)
@@ -208,24 +206,23 @@ static int mv_usb2_phy_28nm_init(struct phy *phy)
*/
/* Make sure PHY Calibration is ready */
- if (!wait_for_reg(base + PHY_28NM_CAL_REG,
- PHY_28NM_PLL_PLLCAL_DONE | PHY_28NM_PLL_IMPCAL_DONE,
- HZ / 10)) {
+ ret = wait_for_reg(base + PHY_28NM_CAL_REG,
+ PHY_28NM_PLL_PLLCAL_DONE | PHY_28NM_PLL_IMPCAL_DONE,
+ 100);
+ if (ret) {
dev_warn(&pdev->dev, "USB PHY PLL calibrate not done after 100mS.");
- ret = -ETIMEDOUT;
goto err_clk;
}
- if (!wait_for_reg(base + PHY_28NM_RX_REG1,
- PHY_28NM_RX_SQCAL_DONE, HZ / 10)) {
+ ret = wait_for_reg(base + PHY_28NM_RX_REG1,
+ PHY_28NM_RX_SQCAL_DONE, 100);
+ if (ret) {
dev_warn(&pdev->dev, "USB PHY RX SQ calibrate not done after 100mS.");
- ret = -ETIMEDOUT;
goto err_clk;
}
/* Make sure PHY PLL is ready */
- if (!wait_for_reg(base + PHY_28NM_PLL_REG0,
- PHY_28NM_PLL_READY, HZ / 10)) {
+ ret = wait_for_reg(base + PHY_28NM_PLL_REG0, PHY_28NM_PLL_READY, 100);
+ if (ret) {
dev_warn(&pdev->dev, "PLL_READY not set after 100mS.");
- ret = -ETIMEDOUT;
goto err_clk;
}
--
1.9.1
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next prev parent reply other threads:[~2020-08-25 2:14 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-25 2:03 [PATCH 1/6] phy: phy-bcm-ns-usb3: convert to readl_poll_timeout_atomic() Chunfeng Yun
2020-08-25 2:03 ` [PATCH 2/6] phy: phy-bcm-ns2-usbdrd: " Chunfeng Yun
2020-08-25 2:03 ` [PATCH 3/6] phy: phy-bcm-sr-usb: " Chunfeng Yun
2020-08-25 2:03 ` [PATCH 4/6] phy: phy-qcom-apq8064-sata: convert to readl_relaxed_poll_timeout() Chunfeng Yun
2020-08-25 2:03 ` [PATCH 5/6] phy: phy-pxa-28nm-hsic: convert to readl_poll_timeout() Chunfeng Yun
2020-08-25 2:03 ` Chunfeng Yun [this message]
2020-09-08 4:26 ` [PATCH 1/6] phy: phy-bcm-ns-usb3: convert to readl_poll_timeout_atomic() Vinod Koul
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