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Mon, 07 Sep 2020 22:25:17 -0800 Received: from MTKMBS01N1.mediatek.inc (172.21.101.68) by MTKMBS62N2.mediatek.inc (172.29.193.42) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 7 Sep 2020 23:25:15 -0700 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs01n1.mediatek.inc (172.21.101.68) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 8 Sep 2020 14:25:13 +0800 Received: from [172.21.77.33] (172.21.77.33) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 8 Sep 2020 14:25:14 +0800 Message-ID: <1599546314.24690.3.camel@mtkswgap22> Subject: Re: [PATCH v10 3/3] clk: mediatek: add UART0 clock support From: Hanks Chen To: Michael Turquette , Stephen Boyd , Matthias Brugger Date: Tue, 8 Sep 2020 14:25:14 +0800 In-Reply-To: <1596115816-11758-4-git-send-email-hanks.chen@mediatek.com> References: <1596115816-11758-1-git-send-email-hanks.chen@mediatek.com> <1596115816-11758-4-git-send-email-hanks.chen@mediatek.com> X-Mailer: Evolution 3.2.3-0ubuntu6 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200908_022522_927592_07C410EE X-CRM114-Status: GOOD ( 16.99 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, CC Hwang , Stephen Boyd , Andy Teng , Linus Walleij , YueHaibing , linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org, Rob Herring , linux-mediatek@lists.infradead.org, Loda Chou , Matthias Brugger , mtk01761 , Michael Turquette , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Hi all, Gentle ping on this patch. Thanks Hanks Chen On Thu, 2020-07-30 at 21:30 +0800, Hanks Chen wrote: > Add MT6779 UART0 clock support. > > Fixes: 710774e04861 ("clk: mediatek: Add MT6779 clock support") > Signed-off-by: Wendell Lin > Signed-off-by: Hanks Chen > Reviewed-by: Matthias Brugger > --- > drivers/clk/mediatek/clk-mt6779.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/clk/mediatek/clk-mt6779.c b/drivers/clk/mediatek/clk-mt6779.c > index 9766cccf5844..6e0d3a166729 100644 > --- a/drivers/clk/mediatek/clk-mt6779.c > +++ b/drivers/clk/mediatek/clk-mt6779.c > @@ -919,6 +919,8 @@ static const struct mtk_gate infra_clks[] = { > "pwm_sel", 19), > GATE_INFRA0(CLK_INFRA_PWM, "infra_pwm", > "pwm_sel", 21), > + GATE_INFRA0(CLK_INFRA_UART0, "infra_uart0", > + "uart_sel", 22), > GATE_INFRA0(CLK_INFRA_UART1, "infra_uart1", > "uart_sel", 23), > GATE_INFRA0(CLK_INFRA_UART2, "infra_uart2", _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek