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Fri, 09 Oct 2020 05:01:18 -0800 Received: from MTKMBS31N1.mediatek.inc (172.27.4.69) by MTKMBS62DR.mediatek.inc (172.29.94.18) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 9 Oct 2020 05:53:08 -0700 Received: from MTKCAS32.mediatek.inc (172.27.4.184) by MTKMBS31N1.mediatek.inc (172.27.4.69) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 9 Oct 2020 20:53:04 +0800 Received: from [10.17.3.153] (10.17.3.153) by MTKCAS32.mediatek.inc (172.27.4.170) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 9 Oct 2020 20:53:04 +0800 Message-ID: <1602247986.31946.7.camel@mhfsdcap03> Subject: Re: [PATCH v6 2/4] PCI: mediatek: Add new method to get shared pcie-cfg base and irq From: Chuanjia Liu To: Rob Herring Date: Fri, 9 Oct 2020 20:53:06 +0800 In-Reply-To: <20200930152317.GA2891120@bogus> References: <20200914112659.7091-1-chuanjia.liu@mediatek.com> <20200914112659.7091-3-chuanjia.liu@mediatek.com> <20200930152317.GA2891120@bogus> X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-TM-SNTS-SMTP: 3F21F7E52E8679CF364EFB6F4570F032D594BEA8EFFEA4739B3B03C72BF09E392000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201009_090131_739452_B031908A X-CRM114-Status: GOOD ( 26.86 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Lorenzo Pieralisi , Frank Wunderlich , linux-pci@vger.kernel.org, Matthias Brugger , Ryder Lee , linux-mediatek@lists.infradead.org, yong.wu@mediatek.com, Bjorn Helgaas , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org On Wed, 2020-09-30 at 10:23 -0500, Rob Herring wrote: > On Mon, Sep 14, 2020 at 07:26:57PM +0800, Chuanjia Liu wrote: > > Add new method to get shared pcie-cfg base and pcie irq for > > new dts format. > > > > Signed-off-by: Chuanjia Liu > > Acked-by: Ryder Lee > > --- > > drivers/pci/controller/pcie-mediatek.c | 23 ++++++++++++++++++++++- > > 1 file changed, 22 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/pci/controller/pcie-mediatek.c b/drivers/pci/controller/pcie-mediatek.c > > index cf4c18f0c25a..5b915eb0cf1e 100644 > > --- a/drivers/pci/controller/pcie-mediatek.c > > +++ b/drivers/pci/controller/pcie-mediatek.c > > @@ -14,6 +14,7 @@ > > #include > > #include > > #include > > +#include > > #include > > #include > > #include > > @@ -23,6 +24,7 @@ > > #include > > #include > > #include > > +#include > > #include > > > > #include "../pci.h" > > @@ -205,6 +207,7 @@ struct mtk_pcie_port { > > * struct mtk_pcie - PCIe host information > > * @dev: pointer to PCIe device > > * @base: IO mapped register base > > + * @cfg: IO mapped register map for PCIe config > > * @free_ck: free-run reference clock > > * @mem: non-prefetchable memory resource > > * @ports: pointer to PCIe port information > > @@ -213,6 +216,7 @@ struct mtk_pcie_port { > > struct mtk_pcie { > > struct device *dev; > > void __iomem *base; > > + struct regmap *cfg; > > struct clk *free_ck; > > > > struct list_head ports; > > @@ -648,7 +652,11 @@ static int mtk_pcie_setup_irq(struct mtk_pcie_port *port, > > return err; > > } > > > > - port->irq = platform_get_irq(pdev, port->slot); > > + if (of_find_property(dev->of_node, "interrupt-names", NULL)) > > + port->irq = platform_get_irq_byname(pdev, "pcie_irq"); > > Not really any point in having a name with a single interrupt. > > > + else > > + port->irq = platform_get_irq(pdev, port->slot); > > With the new binding, slot is always 0, right? Then you don't need any > change here. In the new binding, PCIe1 slot number is 1. Because some setting in the driver is based on slot number to determine offset, this is to reduce driver changes and be compatible with new and old DTS format. > > > + > > if (port->irq < 0) > > return port->irq; > > > > @@ -680,6 +688,10 @@ static int mtk_pcie_startup_port_v2(struct mtk_pcie_port *port) > > val |= PCIE_CSR_LTSSM_EN(port->slot) | > > PCIE_CSR_ASPM_L1_EN(port->slot); > > writel(val, pcie->base + PCIE_SYS_CFG_V2); > > + } else if (pcie->cfg) { > > + val = PCIE_CSR_LTSSM_EN(port->slot) | > > + PCIE_CSR_ASPM_L1_EN(port->slot); > > + regmap_update_bits(pcie->cfg, PCIE_SYS_CFG_V2, val, val); > > } > > > > /* Assert all reset signals */ > > @@ -983,6 +995,7 @@ static int mtk_pcie_subsys_powerup(struct mtk_pcie *pcie) > > struct device *dev = pcie->dev; > > struct platform_device *pdev = to_platform_device(dev); > > struct resource *regs; > > + struct device_node *cfg_node; > > int err; > > > > /* get shared registers, which are optional */ > > @@ -995,6 +1008,14 @@ static int mtk_pcie_subsys_powerup(struct mtk_pcie *pcie) > > } > > } > > > > + cfg_node = of_find_compatible_node(NULL, NULL, > > + "mediatek,generic-pciecfg"); > > + if (cfg_node) { > > + pcie->cfg = syscon_node_to_regmap(cfg_node); > > + if (IS_ERR(pcie->cfg)) > > + return PTR_ERR(pcie->cfg); > > + } > > + > > pcie->free_ck = devm_clk_get(dev, "free_ck"); > > if (IS_ERR(pcie->free_ck)) { > > if (PTR_ERR(pcie->free_ck) == -EPROBE_DEFER) > > -- > > 2.18.0 _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek