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Sun, 18 Apr 2021 09:36:10 -0700 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 19 Apr 2021 00:36:09 +0800 Received: from mtkswgap22.mediatek.inc (172.21.77.33) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 19 Apr 2021 00:36:09 +0800 From: To: , CC: , , , , , , , , , , , , , Lorenzo Bianconi Subject: [PATCH 3/6] mt76: mt7921: introduce mt7921_dma_{enable, disable} utilities Date: Mon, 19 Apr 2021 00:36:04 +0800 Message-ID: <1618763767-1292-4-git-send-email-sean.wang@mediatek.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1618763767-1292-1-git-send-email-sean.wang@mediatek.com> References: <1618763767-1292-1-git-send-email-sean.wang@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210418_093620_499709_C02C7094 X-CRM114-Status: GOOD ( 14.45 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org From: Lorenzo Bianconi Introduce mt7921_dma_enable and mt7921_dma_disable utilities routine in order for code reusing between mt7921_dma_reset and mt7921_dma_init. This is a preliminary patch to reset dma during device driver_own request. Signed-off-by: Sean Wang Signed-off-by: Lorenzo Bianconi --- .../net/wireless/mediatek/mt76/mt7921/dma.c | 108 ++++++------------ 1 file changed, 35 insertions(+), 73 deletions(-) diff --git a/drivers/net/wireless/mediatek/mt76/mt7921/dma.c b/drivers/net/wireless/mediatek/mt76/mt7921/dma.c index 4aad355f8394..8c556ff3ae93 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7921/dma.c +++ b/drivers/net/wireless/mediatek/mt76/mt7921/dma.c @@ -198,18 +198,8 @@ static u32 mt7921_rmw(struct mt76_dev *mdev, u32 offset, u32 mask, u32 val) return dev->bus_ops->rmw(mdev, addr, mask, val); } -static int mt7921_dmashdl_disabled(struct mt7921_dev *dev) +static int mt7921_dma_disable(struct mt7921_dev *dev, bool force) { - mt76_clear(dev, MT_WFDMA0_GLO_CFG_EXT0, MT_WFDMA0_CSR_TX_DMASHDL_ENABLE); - mt76_set(dev, MT_DMASHDL_SW_CONTROL, MT_DMASHDL_DMASHDL_BYPASS); - - return 0; -} - -static int mt7921_dma_reset(struct mt7921_dev *dev, bool force) -{ - int i; - if (force) { /* reset */ mt76_clear(dev, MT_WFDMA0_RST, @@ -221,6 +211,11 @@ static int mt7921_dma_reset(struct mt7921_dev *dev, bool force) MT_WFDMA0_RST_LOGIC_RST); } + /* disable dmashdl */ + mt76_clear(dev, MT_WFDMA0_GLO_CFG_EXT0, + MT_WFDMA0_CSR_TX_DMASHDL_ENABLE); + mt76_set(dev, MT_DMASHDL_SW_CONTROL, MT_DMASHDL_DMASHDL_BYPASS); + /* disable WFDMA0 */ mt76_clear(dev, MT_WFDMA0_GLO_CFG, MT_WFDMA0_GLO_CFG_TX_DMA_EN | MT_WFDMA0_GLO_CFG_RX_DMA_EN | @@ -234,18 +229,11 @@ static int mt7921_dma_reset(struct mt7921_dev *dev, bool force) MT_WFDMA0_GLO_CFG_RX_DMA_BUSY, 0, 1000)) return -ETIMEDOUT; - /* reset hw queues */ - for (i = 0; i < __MT_TXQ_MAX; i++) - mt76_queue_reset(dev, dev->mphy.q_tx[i]); - - for (i = 0; i < __MT_MCUQ_MAX; i++) - mt76_queue_reset(dev, dev->mt76.q_mcu[i]); - - mt76_for_each_q_rx(&dev->mt76, i) - mt76_queue_reset(dev, &dev->mt76.q_rx[i]); - - mt76_tx_status_check(&dev->mt76, NULL, true); + return 0; +} +static int mt7921_dma_enable(struct mt7921_dev *dev) +{ /* configure perfetch settings */ mt7921_dma_prefetch(dev); @@ -272,11 +260,33 @@ static int mt7921_dma_reset(struct mt7921_dev *dev, bool force) mt7921_irq_enable(dev, MT_INT_RX_DONE_ALL | MT_INT_TX_DONE_ALL | MT_INT_MCU_CMD); - mt76_set(dev, MT_MCU2HOST_SW_INT_ENA, MT_MCU_CMD_WAKE_RX_PCIE); return 0; } +static int mt7921_dma_reset(struct mt7921_dev *dev, bool force) +{ + int i, err; + + err = mt7921_dma_disable(dev, force); + if (err) + return err; + + /* reset hw queues */ + for (i = 0; i < __MT_TXQ_MAX; i++) + mt76_queue_reset(dev, dev->mphy.q_tx[i]); + + for (i = 0; i < __MT_MCUQ_MAX; i++) + mt76_queue_reset(dev, dev->mt76.q_mcu[i]); + + mt76_for_each_q_rx(&dev->mt76, i) + mt76_queue_reset(dev, &dev->mt76.q_rx[i]); + + mt76_tx_status_check(&dev->mt76, NULL, true); + + return mt7921_dma_enable(dev); +} + int mt7921_wfsys_reset(struct mt7921_dev *dev) { mt76_set(dev, 0x70002600, BIT(0)); @@ -339,32 +349,10 @@ int mt7921_dma_init(struct mt7921_dev *dev) mt76_dma_attach(&dev->mt76); - /* reset */ - mt76_clear(dev, MT_WFDMA0_RST, - MT_WFDMA0_RST_DMASHDL_ALL_RST | - MT_WFDMA0_RST_LOGIC_RST); - - mt76_set(dev, MT_WFDMA0_RST, - MT_WFDMA0_RST_DMASHDL_ALL_RST | - MT_WFDMA0_RST_LOGIC_RST); - - ret = mt7921_dmashdl_disabled(dev); + ret = mt7921_dma_disable(dev, true); if (ret) return ret; - /* disable WFDMA0 */ - mt76_clear(dev, MT_WFDMA0_GLO_CFG, - MT_WFDMA0_GLO_CFG_TX_DMA_EN | - MT_WFDMA0_GLO_CFG_RX_DMA_EN | - MT_WFDMA0_GLO_CFG_CSR_DISP_BASE_PTR_CHAIN_EN | - MT_WFDMA0_GLO_CFG_OMIT_TX_INFO | - MT_WFDMA0_GLO_CFG_OMIT_RX_INFO | - MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2); - - mt76_poll(dev, MT_WFDMA0_GLO_CFG, - MT_WFDMA0_GLO_CFG_TX_DMA_BUSY | - MT_WFDMA0_GLO_CFG_RX_DMA_BUSY, 0, 1000); - /* init tx queue */ ret = mt7921_init_tx_queues(&dev->phy, MT7921_TXQ_BAND0, MT7921_TX_RING_SIZE); @@ -416,33 +404,7 @@ int mt7921_dma_init(struct mt7921_dev *dev) mt7921_poll_tx, NAPI_POLL_WEIGHT); napi_enable(&dev->mt76.tx_napi); - /* configure perfetch settings */ - mt7921_dma_prefetch(dev); - - /* reset dma idx */ - mt76_wr(dev, MT_WFDMA0_RST_DTX_PTR, ~0); - - /* configure delay interrupt */ - mt76_wr(dev, MT_WFDMA0_PRI_DLY_INT_CFG0, 0); - - mt76_set(dev, MT_WFDMA0_GLO_CFG, - MT_WFDMA0_GLO_CFG_TX_WB_DDONE | - MT_WFDMA0_GLO_CFG_FIFO_LITTLE_ENDIAN | - MT_WFDMA0_GLO_CFG_CLK_GAT_DIS | - MT_WFDMA0_GLO_CFG_OMIT_TX_INFO | - MT_WFDMA0_GLO_CFG_CSR_DISP_BASE_PTR_CHAIN_EN | - MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2); - - mt76_set(dev, MT_WFDMA0_GLO_CFG, - MT_WFDMA0_GLO_CFG_TX_DMA_EN | MT_WFDMA0_GLO_CFG_RX_DMA_EN); - - mt76_set(dev, MT_WFDMA_DUMMY_CR, MT_WFDMA_NEED_REINIT); - - /* enable interrupts for TX/RX rings */ - mt7921_irq_enable(dev, MT_INT_RX_DONE_ALL | MT_INT_TX_DONE_ALL | - MT_INT_MCU_CMD); - - return 0; + return mt7921_dma_enable(dev); } void mt7921_dma_cleanup(struct mt7921_dev *dev) -- 2.25.1 _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek