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From: Vinod Koul <vkoul@kernel.org>
To: mani@kernel.org,
	 AngeloGioacchino Del Regno
	<angelogioacchino.delregno@collabora.com>
Cc: chunfeng.yun@mediatek.com, neil.armstrong@linaro.org,
	robh@kernel.org,  krzk+dt@kernel.org, conor+dt@kernel.org,
	matthias.bgg@gmail.com,  chunkuang.hu@kernel.org,
	p.zabel@pengutronix.de, justin.yeh@mediatek.com,
	 linux-arm-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org,
	 linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
	 linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	 kernel@collabora.com
Subject: Re: [PATCH v4 00/12] PHY: MediaTek DP PHY refactor and MT8196 eDP
Date: Sun, 13 Sep 2026 16:26:15 +0530	[thread overview]
Message-ID: <178929697500.215437.15947728409079441751.b4-ty@kernel.org> (raw)
In-Reply-To: <20260910092038.48291-1-angelogioacchino.delregno@collabora.com>


On Thu, 10 Sep 2026 11:20:26 +0200, AngeloGioacchino Del Regno wrote:
> Changes in v4:
>  - Removed error checking from all regmap_(bulk_){read,write} calls
>    as those are on MMIO and can't fail (Mani)
>  - Changed some of the error prints in mtk_dp_phy_get_one_cal_para()
>    to dev_err_probe() (Mani, Sashiko)
> 
> Changes in v3:
>  - Added missing bitfield.h, pm_runtime.h includes (Sashiko)
>  - Set calibration data before registering PHY (Sashiko)
>  - Enable PM Runtime before creating PHY device (Sashiko)
>  - Continue poweroff if some write fails, but still return failure
>    as that would be a partial poweroff anyway (Sashiko)
>  - Added zero driving params to fix default calibration data setting (Sashiko)
>  - Added NULL check on device_Get_match_data (Sashiko)
> 
> [...]

Applied, thanks!

[01/12] dt-bindings: phy: Document MT8195 and MT8196 DisplayPort PHYs
        commit: 1e432224ed9b31607802ff4e370b73468ca9a452
[02/12] phy: phy-mtk-dp: Rename regs to regmap in struct mtk_dp_phy
        commit: da3c07602f6761403a2ee1b155e7645465c0d36f
[03/12] phy: phy-mtk-dp: Allow probing with devicetree match
        commit: e78be6a5410cf74534be19b3be1090c325132f56
[04/12] phy: phy-mtk-dp: Migrate register offsets to SoC specific pdata
        commit: ae859204b519a384ad0136c21599bab9321090ce
[05/12] phy: phy-mtk-dp: Implement power_on and power_off PHY callbacks
        commit: 10e7b846fc5ed8d3420fc8eb1c0b4524e952b4ac
[06/12] phy: phy-mtk-dp: Support set_lanes in configure and properly cleanup
        commit: 0382b9948627e091aeffcb8be311ea2b26dc1665
[07/12] phy: phy-mtk-dp: Support setting volt swing and preemphasis values
        commit: 283aa3fbbc80e1c1b23264f0bd00a96f5cebbbec
[08/12] phy: phy-mtk-dp: Add support for digital and analog calibration
        commit: 7cf38eb0ab595fc312bef06faedf8a0f0dcb8fcd
[09/12] phy: phy-mtk-dp: Rewrite and document default driving param macros
        commit: 5d907e1bac8a4bf3209fca42ac93c9d2c7f723f8
[10/12] phy: phy-mtk-dp: Add bitrate register val definitions to SoC data
        commit: 53e25169561a500dbcc4992dad17795a11e3e6bf
[11/12] phy: phy-mtk-dp: Add PHYD Lane EN register mask to SoC data
        commit: 09782cc51273ba594905633e1e59ee3c3b82fe6a
[12/12] phy: phy-mtk-dp: Add support for MT8196 eDP PHY
        commit: 6fe4d5beac728b447e77dab158985550ae58718c

Best regards,
-- 
~Vinod




      parent reply	other threads:[~2026-09-13 10:56 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-10  9:20 [PATCH v4 00/12] PHY: MediaTek DP PHY refactor and MT8196 eDP AngeloGioacchino Del Regno
2026-09-10  9:20 ` [PATCH v4 01/12] dt-bindings: phy: Document MT8195 and MT8196 DisplayPort PHYs AngeloGioacchino Del Regno
2026-09-10  9:20 ` [PATCH v4 02/12] phy: phy-mtk-dp: Rename regs to regmap in struct mtk_dp_phy AngeloGioacchino Del Regno
2026-09-10  9:20 ` [PATCH v4 03/12] phy: phy-mtk-dp: Allow probing with devicetree match AngeloGioacchino Del Regno
2026-09-10  9:20 ` [PATCH v4 04/12] phy: phy-mtk-dp: Migrate register offsets to SoC specific pdata AngeloGioacchino Del Regno
2026-09-10  9:20 ` [PATCH v4 05/12] phy: phy-mtk-dp: Implement power_on and power_off PHY callbacks AngeloGioacchino Del Regno
2026-09-11  5:17   ` Manivannan Sadhasivam
2026-09-10  9:20 ` [PATCH v4 06/12] phy: phy-mtk-dp: Support set_lanes in configure and properly cleanup AngeloGioacchino Del Regno
2026-09-11  5:17   ` Manivannan Sadhasivam
2026-09-10  9:20 ` [PATCH v4 07/12] phy: phy-mtk-dp: Support setting volt swing and preemphasis values AngeloGioacchino Del Regno
2026-09-10  9:20 ` [PATCH v4 08/12] phy: phy-mtk-dp: Add support for digital and analog calibration AngeloGioacchino Del Regno
2026-09-11  5:19   ` Manivannan Sadhasivam
2026-09-10  9:20 ` [PATCH v4 09/12] phy: phy-mtk-dp: Rewrite and document default driving param macros AngeloGioacchino Del Regno
2026-09-10  9:20 ` [PATCH v4 10/12] phy: phy-mtk-dp: Add bitrate register val definitions to SoC data AngeloGioacchino Del Regno
2026-09-10  9:20 ` [PATCH v4 11/12] phy: phy-mtk-dp: Add PHYD Lane EN register mask " AngeloGioacchino Del Regno
2026-09-11  5:20   ` Manivannan Sadhasivam
2026-09-10  9:20 ` [PATCH v4 12/12] phy: phy-mtk-dp: Add support for MT8196 eDP PHY AngeloGioacchino Del Regno
2026-09-13 10:56 ` Vinod Koul [this message]

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