From mboxrd@z Thu Jan 1 00:00:00 1970 From: Boris Brezillon Subject: Re: [RFCv2: PATCH 1/2] mtd: mediatek: device tree docs for MTK Smart Device Gen1 NAND Date: Tue, 22 Mar 2016 14:52:58 +0100 Message-ID: <20160322145258.44945c64@bbrezillon> References: <1458653560-2679-1-git-send-email-jorge.ramirez-ortiz@linaro.org> <1458653560-2679-2-git-send-email-jorge.ramirez-ortiz@linaro.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1458653560-2679-2-git-send-email-jorge.ramirez-ortiz-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+glpam-linux-mediatek=m.gmane.org-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org To: Jorge Ramirez-Ortiz Cc: robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, daniel.thompson-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org, erin.lo-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org, linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, matthias.bgg-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, xiaolei.li-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org, computersforpeace-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org List-Id: linux-mediatek@lists.infradead.org On Tue, 22 Mar 2016 09:32:39 -0400 Jorge Ramirez-Ortiz wrote: > This patch adds documentation support for Smart Device Gen1 type of > NAND controllers. > > Mediatek's SoC 2701 is one of the SoCs that implements this controller. > > Signed-off-by: Jorge Ramirez-Ortiz > --- > .../devicetree/bindings/mtd/mtksdg1-nand.txt | 143 +++++++++++++++++++++ > 1 file changed, 143 insertions(+) > create mode 100644 Documentation/devicetree/bindings/mtd/mtksdg1-nand.txt > > diff --git a/Documentation/devicetree/bindings/mtd/mtksdg1-nand.txt b/Documentation/devicetree/bindings/mtd/mtksdg1-nand.txt > new file mode 100644 > index 0000000..be6c579 > --- /dev/null > +++ b/Documentation/devicetree/bindings/mtd/mtksdg1-nand.txt > @@ -0,0 +1,143 @@ > +MTK Smart Device SoCs NAND FLASH controller (NFC) DT binding > + > +This file documents the device tree bindings for the Smart Device Gen1 > +NAND controllers. The functional split of the controller requires two > +drivers to operate: the nand controller interface driver and the ECC > +controller driver. > + > +The hardware description for both devices must be captured as device > +tree nodes. > + > +1) NFC NAND Controller Interface (NFI): > +======================================= > + > +The first part of NFC is NAND Controller Interface (NFI) HW. > +Required NFI properties: > +- compatible: Should be "mediatek,mtxxxx-nfc". > +- reg: Base physical address and size of NFI. > +- interrupts: Interrupts of NFI. > +- clocks: NFI required clocks. > +- clock-names: NFI clocks internal name. > +- status: Disabled default. Then set "okay" by platform. > +- mediatek,ecc-controller: Required ECC Engine node. > +- #address-cells: NAND chip index, should be 1. > +- #size-cells: Should be 0. > + > +Example: > + > + nand: nfi@1100d000 { I would name it nandc or nand-controller instead of just nand, to make it clear that it's representing the NAND controller. > + compatible = "mediatek,mt2701-nfc"; > + reg = <0 0x1100d000 0 0x1000>; > + interrupts = ; > + clocks = <&pericfg CLK_PERI_NFI>, > + <&pericfg CLK_PERI_NFI_PAD>; > + clock-names = "nfi_clk", "pad_clk"; > + nand-on-flash-bbt; > + status = "disabled"; > + mediatek,ecc-controller = <&bch>; Now that 2 different drivers use the same way to link the ECC engine and the NAND controller we can think about defining a generic property (ecc-engine ?), and provide a generic framework. The generic framework part is not something I'm asking right now, but I think we should start using a generic property here. > + #address-cells = <1>; > + #size-cells = <0>; > + }; > + > +Platform related properties, should be set in {platform_name}.dts: > +- children nodes: NAND chips. > + > +Children nodes properties: > +- reg: Chip Select Signal, default 0. > + Set as reg = <0>, <1> when need 2 CS. > +- spare_per_sector: Spare size of each sector. > +- nand-ecc-strength: Number of bits to correct per ECC step. > +- nand-ecc-step-size: Number of data bytes covered by a single ECC step. > + > +Optional: > +- vmch-supply: NAND power supply. > +- pinctrl-names: Default NAND pin GPIO setting name. > +- pinctrl-0: GPIO setting node. > + > +Example: > + &pio { > + nand_pins_default: nanddefault { > + pins_dat { > + pinmux = , > + , > + , > + , > + , > + , > + , > + , > + ; > + input-enable; > + drive-strength = ; > + bias-pull-up; > + }; > + > + pins_we { > + pinmux = ; > + drive-strength = ; > + bias-pull-up = ; > + }; > + > + pins_ale { > + pinmux = ; > + drive-strength = ; > + bias-pull-down = ; > + }; > + }; > + }; > + > + &nand { > + status = "okay"; > + pinctrl-names = "default"; > + pinctrl-0 = <&nand_pins_default>; > + chip@0 { With the parent renamed, you can just use nand@X here. > + reg = <0>; > + spare_per_sector = <56>; > + nand-ecc-strength = <24>; > + nand-ecc-step-size = <1024>; > + }; > + }; > + > +NAND chip optional subnodes: > +- Partitions, see Documentation/devicetree/bindings/mtd/partition.txt > + > +Example: > + chip@0 { > + partitions { > + compatible = "fixed-partitions"; > + #address-cells = <1>; > + #size-cells = <1>; > + > + preloader@0 { > + label = "pl"; > + read-only; > + reg = <0x00000000 0x00400000>; > + }; > + android@0x00400000 { > + label = "android"; > + reg = <0x00400000 0x12c00000>; > + }; > + }; > + }; > + > +2) ECC Engine: > +============== > + > +Required BCH properties: > +- compatible: Should be "mediatek,mtxxxx-ecc". > +- reg: Base physical address and size of ECC. > +- interrupts: Interrupts of ECC. > +- clocks: ECC required clocks. > +- clock-names: ECC clocks internal name. > +- status: Disabled default. Then set "okay" by platform. > + > +Example: > + > + bch: ecc@1100e000 { > + compatible = "mediatek,mt2701-ecc"; > + reg = <0 0x1100e000 0 0x1000>; > + interrupts = ; > + clocks = <&pericfg CLK_PERI_NFI_ECC>; > + clock-names = "nfiecc_clk"; > + status = "disabled"; > + }; Otherwise the bindings look good to me. Thanks, Boris -- Boris Brezillon, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com