From: Rob Herring <robh@kernel.org>
To: John Crispin <blogic@openwrt.org>
Cc: "David S. Miller" <davem@davemloft.net>,
"Felix Fietkau" <nbd@openwrt.org>,
"Matthias Brugger" <matthias.bgg@gmail.com>,
"Sean Wang (王志亘)" <sean.wang@mediatek.com>,
netdev@vger.kernel.org, linux-mediatek@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH 1/9] net: mediatek: update the IRQ part of the binding document
Date: Mon, 11 Apr 2016 10:24:38 -0500 [thread overview]
Message-ID: <20160411152438.GA16983@rob-hp-laptop> (raw)
In-Reply-To: <1460051876-53135-1-git-send-email-blogic@openwrt.org>
On Thu, Apr 07, 2016 at 07:57:48PM +0200, John Crispin wrote:
> The current binding document only describes a single interrupt. Update the
> document by adding the 2 other interrupts.
>
> The driver currently only uses a single interrupt. The HW is however able
> to using IRQ grouping to split TX and RX onto separate GIC irqs.
I assume you aren't breaking existing DTs, and the driver will continue
to work with a single irq specified?
>
> Signed-off-by: John Crispin <blogic@openwrt.org>
> Cc: devicetree@vger.kernel.org
> ---
> Documentation/devicetree/bindings/net/mediatek-net.txt | 6 ++++--
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/net/mediatek-net.txt b/Documentation/devicetree/bindings/net/mediatek-net.txt
> index 5ca7929..2f142be 100644
> --- a/Documentation/devicetree/bindings/net/mediatek-net.txt
> +++ b/Documentation/devicetree/bindings/net/mediatek-net.txt
> @@ -9,7 +9,7 @@ have dual GMAC each represented by a child node..
> Required properties:
> - compatible: Should be "mediatek,mt7623-eth"
> - reg: Address and length of the register set for the device
> -- interrupts: Should contain the frame engines interrupt
> +- interrupts: Should contain the three frame engines interrupts
Need to define what each irq is and the order.
> - clocks: the clock used by the core
> - clock-names: the names of the clock listed in the clocks property. These are
> "ethif", "esw", "gp2", "gp1"
> @@ -42,7 +42,9 @@ eth: ethernet@1b100000 {
> <ðsys CLK_ETHSYS_GP2>,
> <ðsys CLK_ETHSYS_GP1>;
> clock-names = "ethif", "esw", "gp2", "gp1";
> - interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_LOW>;
> + interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_LOW
> + GIC_SPI 199 IRQ_TYPE_LEVEL_LOW
> + GIC_SPI 198 IRQ_TYPE_LEVEL_LOW>;
> power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>;
> resets = <ðsys MT2701_ETHSYS_ETH_RST>;
> reset-names = "eth";
> --
> 1.7.10.4
> --
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prev parent reply other threads:[~2016-04-11 15:24 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-07 17:57 [PATCH 1/9] net: mediatek: update the IRQ part of the binding document John Crispin
[not found] ` <1460051876-53135-1-git-send-email-blogic-p3rKhJxN3npAfugRpC6u6w@public.gmane.org>
2016-04-07 17:57 ` [PATCH 2/9] net: mediatek: watchdog_timeo was not set John Crispin
2016-04-07 17:57 ` [PATCH 3/9] net: mediatek: mtk_cal_txd_req() returns bad value John Crispin
2016-04-07 17:57 ` [PATCH 4/9] net: mediatek: remove superfluous reset call John Crispin
2016-04-07 17:57 ` [PATCH 5/9] net: mediatek: fix stop and wakeup of queue John Crispin
2016-04-07 17:57 ` [PATCH 8/9] net: mediatek: move the pending_work struct to the device generic struct John Crispin
2016-04-07 17:57 ` [PATCH 9/9] net: mediatek: do not set the QID field in the TX DMA descriptors John Crispin
2016-04-07 18:50 ` [PATCH 1/9] net: mediatek: update the IRQ part of the binding document David Miller
2016-04-07 17:57 ` [PATCH 6/9] net: mediatek: fix mtk_pending_work John Crispin
2016-04-07 17:57 ` [PATCH 7/9] net: mediatek: fix TX locking John Crispin
2016-04-11 15:24 ` Rob Herring [this message]
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