From: Jitao Shi <jitao.shi@mediatek.com>
To: Rob Herring <robh+dt@kernel.org>, Pawel Moll <pawel.moll@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
Ian Campbell <ijc+devicetree@hellion.org.uk>,
linux-pwm@vger.kernel.org, David Airlie <airlied@linux.ie>,
Matthias Brugger <matthias.bgg@gmail.com>
Cc: stonea168@163.com, dri-devel@lists.freedesktop.org,
Andy Yan <andy.yan@rock-chips.com>,
Ajay Kumar <ajaykumar.rs@samsung.com>,
Vincent Palatin <vpalatin@chromium.org>,
cawa.cheng@mediatek.com,
Russell King <rmk+kernel@arm.linux.org.uk>,
Thierry Reding <treding@nvidia.com>,
devicetree@vger.kernel.org, Jitao Shi <jitao.shi@mediatek.com>,
linux-mediatek@lists.infradead.org, yingjoe.chen@mediatek.com,
eddie.huang@mediatek.com, linux-arm-kernel@lists.infradead.org,
Rahul Sharma <rahul.sharma@samsung.com>,
srv_heupstream@mediatek.com, linux-kernel@vger.kernel.org,
Sascha Hauer <kernel@pengutronix.de>,
Sean Paul <seanpaul@chromium.org>
Subject: [v4 4/7] drm/mediatek: add frame size control
Date: Sat, 1 Jun 2019 17:26:12 +0800 [thread overview]
Message-ID: <20190601092615.67917-5-jitao.shi@mediatek.com> (raw)
In-Reply-To: <20190601092615.67917-1-jitao.shi@mediatek.com>
Our new DSI chip has frame size control.
So add the driver data to control for different chips.
Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_dsi.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c
index eea47294079e..18a192656a89 100644
--- a/drivers/gpu/drm/mediatek/mtk_dsi.c
+++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
@@ -78,6 +78,7 @@
#define DSI_VBP_NL 0x24
#define DSI_VFP_NL 0x28
#define DSI_VACT_NL 0x2C
+#define DSI_SIZE_CON 0x38
#define DSI_HSA_WC 0x50
#define DSI_HBP_WC 0x54
#define DSI_HFP_WC 0x58
@@ -162,6 +163,7 @@ struct phy;
struct mtk_dsi_driver_data {
const u32 reg_cmdq_off;
bool has_shadow_ctl;
+ bool has_size_ctl;
};
struct mtk_dsi {
@@ -430,6 +432,9 @@ static void mtk_dsi_config_vdo_timing(struct mtk_dsi *dsi)
writel(vm->vfront_porch, dsi->regs + DSI_VFP_NL);
writel(vm->vactive, dsi->regs + DSI_VACT_NL);
+ if (dsi->driver_data->has_size_ctl)
+ writel(vm->vactive << 16 | vm->hactive, dsi->regs + DSI_SIZE_CON);
+
horizontal_sync_active_byte = (vm->hsync_len * dsi_tmp_buf_bpp - 10);
if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE)
--
2.21.0
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next prev parent reply other threads:[~2019-06-01 9:26 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-01 9:26 [v4 0/7] Support dsi for mt8183 Jitao Shi
2019-06-01 9:26 ` [v4 1/7] drm/mediatek: move mipi_dsi_host_register to probe Jitao Shi
2019-06-03 1:20 ` CK Hu
2019-06-03 6:12 ` Hsin-Yi Wang
2019-06-01 9:26 ` [v4 2/7] drm/mediatek: fixes CMDQ reg address of mt8173 is different with mt2701 Jitao Shi
2019-06-03 2:13 ` CK Hu
2019-06-01 9:26 ` [v4 3/7] drm/mediatek: add dsi reg commit disable control Jitao Shi
2019-06-03 2:19 ` CK Hu
2019-06-01 9:26 ` Jitao Shi [this message]
2019-06-01 9:26 ` [v4 5/7] drm/mediatek: add mt8183 dsi driver support Jitao Shi
2019-06-11 2:37 ` CK Hu
2019-06-01 9:26 ` [v4 6/7] drm/mediatek: change the dsi phytiming calculate method Jitao Shi
2019-06-03 2:45 ` CK Hu
2019-06-03 22:36 ` Nicolas Boichat
2019-06-01 9:26 ` [v4 7/7] drm: mediatek: adjust dsi and mipi_tx probe sequence Jitao Shi
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