From mboxrd@z Thu Jan  1 00:00:00 1970
From: Yong Liang <yong.liang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
Subject: [PATCH 1/2] Include mt8183-reset.h and add reset-cells in infracfg in
 dtsi file.
Date: Thu, 25 Jul 2019 16:09:56 +0800
Message-ID: <20190725080957.17333-1-yong.liang@mediatek.com>
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From: "yong.liang" <yong.liang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>

Change-Id: I46e0aca76a206ac86ee0477d9dbd67e1e924b118
Signed-off-by: yong.liang <yong.liang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
---
 arch/arm64/boot/dts/mediatek/mt8183.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 08274bfcebd8..2589e9461c6e 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -8,6 +8,7 @@
 #include <dt-bindings/clock/mt8183-clk.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/reset-controller/mt8183-resets.h>
 
 / {
 	compatible = "mediatek,mt8183";
@@ -194,6 +195,7 @@
 			compatible = "mediatek,mt8183-infracfg", "syscon";
 			reg = <0 0x10001000 0 0x1000>;
 			#clock-cells = <1>;
+			#reset-cells = <1>;
 		};
 
 		apmixedsys: syscon@1000c000 {
-- 
2.18.0