[RFC PATCH V6 2/3] dt-bindings: mt8183: Add sensor interface dt-bindings

[Louis Kuo <louis.kuo@mediatek.com>]

This patch adds the DT binding documentation for the sensor interface
module in Mediatek SoCs.

Signed-off-by: Louis Kuo <louis.kuo@mediatek.com>
---
 .../bindings/media/mediatek-seninf.yaml       | 219 ++++++++++++++++++
 1 file changed, 219 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/media/mediatek-seninf.yaml

diff --git a/Documentation/devicetree/bindings/media/mediatek-seninf.yaml b/Documentation/devicetree/bindings/media/mediatek-seninf.yaml
new file mode 100644
index 000000000000..c9e5776a2bd0
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/mediatek-seninf.yaml
@@ -0,0 +1,219 @@
+# SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/media/mediatek-seninf.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Mediatek seninf MIPI-CSI2 host driver
+
+maintainers:
+  - Louis Kuo <louis.kuo@mediatek.com>
+
+description: |
+  Seninf MIPI-CSI2 host driver is a HW camera interface controller. It support
+  a widely adopted, simple, high-speed protocol primarily intended for
+  point-to-point image and video transmission between cameras and host devices.
+
+properties:
+  compatible:
+    const: mediatek,mt8183-seninf
+
+  reg:
+    minItems: 2
+    items:
+      - description: The Seninf main register region
+      - description: The RX register region
+
+  reg-names:
+    minItems: 2
+    items:
+      - const: base
+      - const: rx
+
+  interrupts:
+    maxItems: 1
+
+  power-domains:
+    maxItems: 1
+
+  clocks:
+    items:
+      - description: Seninf camsys clock
+      - description: Seninf top mux clock
+
+  clock-names:
+    items:
+      - const: clk_cam_seninf
+      - const: clk_top_mux_seninf
+
+  # See ./video-interfaces.txt for details
+  ports:
+    type: object
+    additionalProperties: false
+
+    properties: 
+      port@0:
+        type: object
+        description: connection point for sensor at port 0
+        additionalProperties: false
+
+        properties:
+          reg:
+            const: 0
+
+        patternProperties:
+          endpoint:
+            type: object
+            additionalProperties: false
+
+            properties:
+              data-lanes:
+                minItems: 1
+                maxItems: 4
+
+              remote-endpoint: true
+
+      port@1:
+        type: object
+        description: connection point for sensor at port 1
+        additionalProperties: false
+
+        properties:
+          reg:
+            const: 1
+
+        patternProperties:
+          endpoint:
+            type: object
+            additionalProperties: false
+
+            properties:
+              data-lanes:
+                minItems: 1
+                maxItems: 4
+
+              remote-endpoint: true
+
+      port@4:
+        type: object
+        description: connection point for camsys
+        additionalProperties: false
+
+        properties:
+          reg:
+            const: 4
+
+        patternProperties:
+          endpoint:
+            type: object
+            additionalProperties: false
+
+            properties:
+              remote-endpoint: true
+
+    required:
+      - port@0
+      - port@1
+      - port@4
+
+required:
+  - compatible
+  - interrupts
+  - clocks
+  - clock-names
+  - power-domains
+  - ports
+
+additionalProperties: false
+
+examples:
+  - |
+
+    #include <dt-bindings/clock/mt8183-clk.h>
+    #include <dt-bindings/interrupt-controller/irq.h>
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/power/mt8183-power.h>
+
+    parent0: parent@0 {
+        #address-cells = <2>;
+        #size-cells = <2>;
+
+        seninf: seninf@1a040000 {
+            compatible = "mediatek,mt8183-seninf";
+            reg = <0 0x1a040000 0 0x8000>,
+                  <0 0x11c80000 0 0x6000>;
+            reg-names = "base", "rx";
+            interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_LOW>;
+            power-domains = <&scpsys MT8183_POWER_DOMAIN_CAM>;
+            clocks = <&camsys CLK_CAM_SENINF>,
+                <&topckgen CLK_TOP_MUX_SENINF>;
+            clock-names = "clk_cam_seninf", "clk_top_mux_seninf";
+
+            ports {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                port@0 {
+                    reg = <0>;
+
+                    mipi_in_bcam: endpoint {
+                        data-lanes = <0 1 3 4>;
+                        remote-endpoint = <&bcam_out>;
+                    };
+                };
+
+                port@1 {
+                    reg = <1>;
+
+                    mipi_in_fcam: endpoint {
+                        data-lanes = <1>;
+                        remote-endpoint = <&fcam_out>;
+                    };
+                };
+
+                port@4 {
+                    reg = <4>;
+
+                    seninf_camisp_endpoint: endpoint {
+                        remote-endpoint = <&camisp_endpoint>;
+                    };
+                };
+            };
+        };
+
+        i2c2: i2c@11009000 {
+            clock-frequency = <400000>;
+            #address-cells = <1>;
+            #size-cells = <0>;
+
+            wcam: camera@36 {
+                compatible = "ovti,ov5695";
+                reg = <0x36>;
+
+                port {
+                    bcam_out: endpoint {
+                        remote-endpoint = <&mipi_in_bcam>;
+                        data-lanes = <0 1 3 4>;
+                    };
+                };
+            };
+        };
+
+        i2c4: i2c@11008000 {
+            clock-frequency = <400000>;
+            #address-cells = <1>;
+            #size-cells = <0>;
+            
+            ucam: camera@3c {
+                compatible = "ovti,ov2685";
+                reg = <0x3c>;
+
+                port {
+                    fcam_out: endpoint {
+                        remote-endpoint = <&mipi_in_fcam>;
+                        data-lanes = <1>;
+                    };
+                };
+            };
+        };
+    };
\ No newline at end of file
-- 
2.18.0
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