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Mon, 1 Jun 2020 03:58:54 -0500 Received: from DLEE104.ent.ti.com (157.170.170.34) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Mon, 1 Jun 2020 03:58:53 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Mon, 1 Jun 2020 03:58:53 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 0518wqOG104672; Mon, 1 Jun 2020 03:58:53 -0500 Date: Mon, 1 Jun 2020 14:28:52 +0530 From: Pratyush Yadav To: Subject: Re: [PATCH v9 13/19] mtd: spi-nor: sfdp: do not make invalid quad enable fatal Message-ID: <20200601085850.um32giucfcvh5oke@ti.com> References: <20200525091544.17270-1-p.yadav@ti.com> <20200525091544.17270-14-p.yadav@ti.com> <2267830.vuSd8QnXzO@192.168.0.120> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <2267830.vuSd8QnXzO@192.168.0.120> User-Agent: NeoMutt/20171215 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200601_015916_187246_2FF60562 X-CRM114-Status: GOOD ( 20.47 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alexandre.belloni@bootlin.com, masonccyang@mxic.com.tw, vigneshr@ti.com, richard@nod.at, nsekhar@ti.com, Nicolas.Ferre@microchip.com, boris.brezillon@collabora.com, michal.simek@xilinx.com, Ludovic.Desroches@microchip.com, broonie@kernel.org, linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, miquel.raynal@bootlin.com, matthias.bgg@gmail.com, linux-mediatek@lists.infradead.org, linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Hi Tudor, On 30/05/20 06:42PM, Tudor.Ambarus@microchip.com wrote: > On Monday, May 25, 2020 12:15:38 PM EEST Pratyush Yadav wrote: > > EXTERNAL EMAIL: Do not click links or open attachments unless you know the > > content is safe > > > > The Micron MT35XU512ABA flash does not support the quad enable bit. But > > instead of programming the Quad Enable Require field to 000b ("Device > > does not have a QE bit"), it is programmed to 111b ("Reserved"). > > > > While this is technically incorrect, it is not reason enough to abort > > BFPT parsing. Instead, continue BFPT parsing assuming there is no quad > > enable bit present. > > > > Signed-off-by: Pratyush Yadav > > --- > > drivers/mtd/spi-nor/sfdp.c | 8 +++----- > > 1 file changed, 3 insertions(+), 5 deletions(-) > > > > diff --git a/drivers/mtd/spi-nor/sfdp.c b/drivers/mtd/spi-nor/sfdp.c > > index 052cabb52df9..9fd3d8d9a127 100644 > > --- a/drivers/mtd/spi-nor/sfdp.c > > +++ b/drivers/mtd/spi-nor/sfdp.c > > @@ -576,10 +576,6 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor, > > > > /* Quad Enable Requirements. */ > > switch (bfpt.dwords[BFPT_DWORD(15)] & BFPT_DWORD15_QER_MASK) { > > - case BFPT_DWORD15_QER_NONE: > > - params->quad_enable = NULL; > > - break; > > - > > case BFPT_DWORD15_QER_SR2_BIT1_BUGGY: > > /* > > * Writing only one byte to the Status Register has the > > @@ -616,8 +612,10 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor, > > params->quad_enable = spi_nor_sr2_bit1_quad_enable; > > break; > > > > + case BFPT_DWORD15_QER_NONE: > > default: > > - return -EINVAL; > > + params->quad_enable = NULL; > > + break; > > I would just add a dev_dbg message and break the switch. > dev_dbg(nor->dev, "BFPT QER reserved value used.\n"); > break; > > You will then have to set params->quad_enable = NULL; in a post_bfpt hook. Ok. Will re-roll. BTW, are you planning to pick up the xSPI/8D support for 5.8? It has been outstanding for quite some time now and it would be great if it can make it through this merge window. -- Regards, Pratyush Yadav Texas Instruments India _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek