[PATCH V5 04/17] arm64: dts: mt8183: add performance state support of scpsys

Henry Chen
2020-09-14T03:15:24Z

Add support for performance state of scpsys on mt8183 platform

Signed-off-by: Henry Chen <henryc.chen@mediatek.com>
---
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index d85bae7..82ca929 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -12,6 +12,7 @@
#include <dt-bindings/reset-controller/mt8183-resets.h>
#include <dt-bindings/phy/phy.h>
#include "mt8183-pinfunc.h"
+#include <dt-bindings/soc/mtk,dvfsrc.h>

/ {
compatible = "mediatek,mt8183";
@@ -340,6 +341,27 @@
#address-cells = <1>;
#size-cells = <0>;

+ operating-points-v2 = <&dvfsrc_opp_table>;
+ dvfsrc_opp_table: opp-table {
+ compatible = "operating-points-v2-level";
+
+ dvfsrc_vol_min: opp1 {
+ opp,level = <MT8183_DVFSRC_LEVEL_1>;
+ };
+
+ dvfsrc_freq_medium: opp2 {
+ opp,level = <MT8183_DVFSRC_LEVEL_2>;
+ };
+
+ dvfsrc_freq_max: opp3 {
+ opp,level = <MT8183_DVFSRC_LEVEL_3>;
+ };
+
+ dvfsrc_vol_max: opp4 {
+ opp,level = <MT8183_DVFSRC_LEVEL_4>;
+ };
+ };
+
audio@MT8183_POWER_DOMAIN_AUDIO {
reg = <MT8183_POWER_DOMAIN_AUDIO>;
};