Re: [PATCH v3 1/4] dt-bindings: mmc: Convert mtk-sd to json-schema

Ulf Hansson
2020-10-05T12:42:01Z

[...]

> diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
> new file mode 100644
> index 000000000000..7f89cbdc52a5
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
> @@ -0,0 +1,168 @@
> +# SPDX-License-Identifier: GPL-2.0
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/mmc/mtk-sd.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: MTK MSDC Storage Host Controller Binding
> +
> +maintainers:
> + - Chaotian Jing <chaotian.jing@mediatek.com>
> + - Wenbin Mei <wenbin.mei@mediatek.com>
> +
> +allOf:
> + - $ref: mmc-controller.yaml#
> +
> +properties:
> + compatible:
> + oneOf:
> + - enum:
> + - mediatek,mt2701-mmc
> + - mediatek,mt2712-mmc
> + - mediatek,mt6779-mmc
> + - mediatek,mt7620-mmc
> + - mediatek,mt7622-mmc
> + - mediatek,mt8135-mmc
> + - mediatek,mt8173-mmc
> + - mediatek,mt8183-mmc
> + - mediatek,mt8516-mmc
> + - items:
> + - const: mediatek,mt7623-mmc
> + - const: mediatek,mt2701-mmc
> +
> + clocks:
> + description:
> + Should contain phandle for the clock feeding the MMC controller.
> + minItems: 2
> + maxItems: 4
> + items:
> + - description: source clock (required).
> + - description: HCLK which used for host (required).
> + - description: independent source clock gate (required for MT2712).
> + - description: bus clock used for internal register access (required for MT2712 MSDC0/3).
> +
> + clock-names:
> + minItems: 2
> + maxItems: 4
> + items:
> + - const: source
> + - const: hclk
> + - const: source_cg
> + - const: bus_clk
> +
> + pinctrl-names:
> + items:
> + - const: default
> + - const: state_uhs
> +
> + pinctrl-0:
> + description:
> + should contain default/high speed pin ctrl.
> + maxItems: 1
> +
> + pinctrl-1:
> + description:
> + should contain uhs mode pin ctrl.
> + maxItems: 1
> +
> + vmmc-supply:
> + description:
> + power to the Core.
> + maxItems: 1
> +
> + vqmmc-supply:
> + description:
> + power to the IO.
> + maxItems: 1

The vmmc and vqmmc are described in the mmc-controller.yaml, so
shouldn't be needed here.

> +
> + assigned-clocks:
> + description:
> + PLL of the source clock.
> + maxItems: 1
> +
> + assigned-clock-parents:
> + description:
> + parent of source clock, used for HS400 mode to get 400Mhz source clock.
> + maxItems: 1
> +
> + hs400-ds-delay:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description:
> + HS400 DS delay setting.
> + minimum: 0
> + maximum: 0xffffffff
> +
> + mediatek,hs200-cmd-int-delay:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description:
> + HS200 command internal delay setting.
> + This field has total 32 stages.
> + The value is an integer from 0 to 31.
> + minimum: 0
> + maximum: 31
> +
> + mediatek,hs400-cmd-int-delay:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description:
> + HS400 command internal delay setting.
> + This field has total 32 stages.
> + The value is an integer from 0 to 31.
> + minimum: 0
> + maximum: 31
> +
> + mediatek,hs400-cmd-resp-sel-rising:
> + $ref: /schemas/types.yaml#/definitions/flag
> + description:
> + HS400 command response sample selection.
> + If present, HS400 command responses are sampled on rising edges.
> + If not present, HS400 command responses are sampled on falling edges.
> +
> + mediatek,latch-ck:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description:
> + Some SoCs do not support enhance_rx, need set correct latch-ck to avoid
> + data crc error caused by stop clock(fifo full) Valid range = [0:0x7].
> + if not present, default value is 0.
> + applied to compatible "mediatek,mt2701-mmc".
> + minimum: 0
> + maximum: 7
> +
> + resets:
> + maxItems: 1
> +
> + reset-names:
> + const: hrst
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - clocks
> + - clock-names

According to the current bindings, the vmmc/vqmmc supplies and the
pinctrls are required as well. I assume you should add them here too!?

[...]

Kind regards
Uffe