Re: [PATCH] drm/mediatek: dsi: Modify horizontal front/back porch byte formula

Bilal Wasim
2020-11-20T00:30:19Z

Hi CK,

On Fri, 20 Nov 2020 07:23:35 +0800
Chun-Kuang Hu <chunkuang.hu@kernel.org> wrote:

> From: CK Hu <ck.hu@mediatek.com>
>
> In the patch to be fixed, horizontal_backporch_byte become to large
> for some panel, so roll back that patch. For small hfp or hbp panel,
> using vm->hfront_porch + vm->hback_porch to calculate
> horizontal_backporch_byte would make it negtive, so
> use horizontal_backporch_byte itself to make it positive.
>
> Fixes: 35bf948f1edb ("drm/mediatek: dsi: Fix scrolling of panel with
> small hfp or hbp")
>
> Signed-off-by: CK Hu <ck.hu@mediatek.com>
> Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
> ---
> drivers/gpu/drm/mediatek/mtk_dsi.c | 61
> +++++++++++------------------- 1 file changed, 22 insertions(+), 39
> deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c
> b/drivers/gpu/drm/mediatek/mtk_dsi.c index 4a188a942c38..65fd99c528af
> 100644 --- a/drivers/gpu/drm/mediatek/mtk_dsi.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
> @@ -444,7 +444,10 @@ static void mtk_dsi_config_vdo_timing(struct
> mtk_dsi *dsi) u32 horizontal_sync_active_byte;
> u32 horizontal_backporch_byte;
> u32 horizontal_frontporch_byte;
> + u32 horizontal_front_back_byte;
> + u32 data_phy_cycles_byte;
> u32 dsi_tmp_buf_bpp, data_phy_cycles;
> + u32 delta;
> struct mtk_phy_timing *timing = &dsi->phy_timing;
>
> struct videomode *vm = &dsi->vm;
> @@ -466,50 +469,30 @@ static void mtk_dsi_config_vdo_timing(struct
> mtk_dsi *dsi) horizontal_sync_active_byte = (vm->hsync_len *
> dsi_tmp_buf_bpp - 10);
> if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE)
> - horizontal_backporch_byte = vm->hback_porch *
> dsi_tmp_buf_bpp;
> + horizontal_backporch_byte = vm->hback_porch *
> dsi_tmp_buf_bpp - 10; else
> horizontal_backporch_byte = (vm->hback_porch +
> vm->hsync_len) *
> - dsi_tmp_buf_bpp;
> + dsi_tmp_buf_bpp - 10;
>
> data_phy_cycles = timing->lpx + timing->da_hs_prepare +
> - timing->da_hs_zero + timing->da_hs_exit;
> -
> - if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST) {
> - if ((vm->hfront_porch + vm->hback_porch) *
> dsi_tmp_buf_bpp >
> - data_phy_cycles * dsi->lanes + 18) {
> - horizontal_frontporch_byte =
> - vm->hfront_porch * dsi_tmp_buf_bpp -
> - (data_phy_cycles * dsi->lanes + 18) *
> - vm->hfront_porch /
> - (vm->hfront_porch + vm->hback_porch);
> -
> - horizontal_backporch_byte =
> - horizontal_backporch_byte -
> - (data_phy_cycles * dsi->lanes + 18) *
> - vm->hback_porch /
> - (vm->hfront_porch + vm->hback_porch);
> - } else {
> - DRM_WARN("HFP less than d-phy, FPS will
> under 60Hz\n");
> - horizontal_frontporch_byte =
> vm->hfront_porch *
> - dsi_tmp_buf_bpp;
> - }
> + timing->da_hs_zero + timing->da_hs_exit +
> 3; +
> + delta = dsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST ? 18 :
> 12; +
> + horizontal_frontporch_byte = vm->hfront_porch *
> dsi_tmp_buf_bpp;
> + horizontal_front_back_byte = horizontal_frontporch_byte +
> horizontal_backporch_byte;
> + data_phy_cycles_byte = data_phy_cycles * dsi->lanes + delta;
> +
> + if (horizontal_front_back_byte > data_phy_cycles_byte) {
> + horizontal_frontporch_byte -= data_phy_cycles_byte *
> +
> horizontal_frontporch_byte /
> +
> horizontal_front_back_byte; +
> + horizontal_backporch_byte -= data_phy_cycles_byte *
> +
> horizontal_backporch_byte /
> +
> horizontal_front_back_byte; } else {
> - if ((vm->hfront_porch + vm->hback_porch) *
> dsi_tmp_buf_bpp >
> - data_phy_cycles * dsi->lanes + 12) {
> - horizontal_frontporch_byte =
> - vm->hfront_porch * dsi_tmp_buf_bpp -
> - (data_phy_cycles * dsi->lanes + 12) *
> - vm->hfront_porch /
> - (vm->hfront_porch + vm->hback_porch);
> - horizontal_backporch_byte =
> horizontal_backporch_byte -
> - (data_phy_cycles * dsi->lanes + 12) *
> - vm->hback_porch /
> - (vm->hfront_porch + vm->hback_porch);
> - } else {
> - DRM_WARN("HFP less than d-phy, FPS will
> under 60Hz\n");
> - horizontal_frontporch_byte =
> vm->hfront_porch *
> - dsi_tmp_buf_bpp;
> - }
> + DRM_WARN("HFP + HBP less than d-phy, FPS will under
> 60Hz\n"); }
>
> writel(horizontal_sync_active_byte, dsi->regs + DSI_HSA_WC);

Tested on Chromebook ELM.

Tested-by: Bilal Wasim <bilal.wasim@imgtec.com>

Thanks,
Bilal