From: Rob Herring <robh@kernel.org>
To: Yongqiang Niu <yongqiang.niu@mediatek.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
devicetree@vger.kernel.org,
Philipp Zabel <p.zabel@pengutronix.de>,
David Airlie <airlied@linux.ie>,
linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
Matthias Brugger <matthias.bgg@gmail.com>,
linux-mediatek@lists.infradead.org,
Daniel Vetter <daniel@ffwll.ch>, CK Hu <ck.hu@mediatek.com>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v8, 1/6] dt-bindings: mediatek: add rdma_fifo_size description for mt8183 display
Date: Thu, 10 Dec 2020 21:40:34 -0600 [thread overview]
Message-ID: <20201211034034.GA3593696@robh.at.kernel.org> (raw)
In-Reply-To: <1607591262-21736-2-git-send-email-yongqiang.niu@mediatek.com>
On Thu, Dec 10, 2020 at 05:07:37PM +0800, Yongqiang Niu wrote:
> rdma fifo size may be different even in same SOC, add this
> property to the corresponding rdma
>
> Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
> ---
> .../bindings/display/mediatek/mediatek,disp.txt | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
> index 1212207..64c64ee 100644
> --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
> +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
> @@ -66,6 +66,13 @@ Required properties (DMA function blocks):
> argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
> for details.
>
> +Optional properties (RDMA function blocks):
> +- mediatek,rdma_fifo_size: rdma fifo size may be different even in same SOC, add this
mediatek,rdma-fifo-size
> + property to the corresponding rdma
> + the value is the Max value which defined in hardware data sheet.
> + rdma_fifo_size of rdma0 in mt8183 is 5120
> + rdma_fifo_size of rdma1 in mt8183 is 2048
> +
> Examples:
>
> mmsys: clock-controller@14000000 {
> @@ -207,3 +214,12 @@ od@14023000 {
> power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
> clocks = <&mmsys CLK_MM_DISP_OD>;
> };
> +
> +rdma1: rdma@1400c000 {
> + compatible = "mediatek,mt8183-disp-rdma";
> + reg = <0 0x1400c000 0 0x1000>;
> + interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_LOW>;
> + power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>;
> + clocks = <&mmsys CLK_MM_DISP_RDMA1>;
> + mediatek,rdma_fifo_size = <2048>;
> +};
> --
> 1.8.1.1.dirty
>
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next prev parent reply other threads:[~2020-12-11 3:40 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-10 9:07 [PATCH v8, 0/6] drm/mediatek: add support for mediatek SOC MT8183 Yongqiang Niu
2020-12-10 9:07 ` [PATCH v8, 1/6] dt-bindings: mediatek: add rdma_fifo_size description for mt8183 display Yongqiang Niu
2020-12-10 15:40 ` Chun-Kuang Hu
2020-12-11 0:43 ` Yongqiang Niu
2020-12-11 14:46 ` Chun-Kuang Hu
2020-12-11 3:40 ` Rob Herring [this message]
2020-12-10 9:07 ` [PATCH v8, 2/6] dt-bindings: mediatek: add " Yongqiang Niu
2020-12-10 15:36 ` Chun-Kuang Hu
2020-12-11 3:41 ` Rob Herring
2020-12-10 9:07 ` [PATCH v8, 3/6] soc: mediatek: mmsys: add mt8183 function call for setting the routing registers Yongqiang Niu
2020-12-11 14:36 ` Chun-Kuang Hu
2020-12-10 9:07 ` [PATCH v8, 4/6] drm/mediatek: add fifo_size into rdma private data Yongqiang Niu
2020-12-10 9:07 ` [PATCH v8, 5/6] drm/mediatek: add RDMA fifo size error handle Yongqiang Niu
2020-12-10 15:50 ` Chun-Kuang Hu
2020-12-11 0:45 ` Yongqiang Niu
2020-12-14 14:54 ` Chun-Kuang Hu
2021-01-05 6:36 ` Yongqiang Niu
2021-01-05 23:09 ` Chun-Kuang Hu
2020-12-10 9:07 ` [PATCH v8, 6/6] drm/mediatek: add support for mediatek SOC MT8183 Yongqiang Niu
2020-12-17 9:03 ` Hsin-Yi Wang
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