From: Bilal Wasim <bilalwasim676@gmail.com>
To: linux-mediatek@lists.infradead.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, matthias.bgg@gmail.com,
enric.balletbo@collabora.com, hsinyi@chromium.org,
weiyi.lu@mediatek.com
Subject: [PATCH 2/2] soc: mediatek: pm-domains: Add domain_supply cap for mfg_async PD
Date: Mon, 1 Feb 2021 10:45:42 +0500 [thread overview]
Message-ID: <20210201054542.1470695-3-Bilal.Wasim@imgtec.com> (raw)
In-Reply-To: <20210201054542.1470695-1-Bilal.Wasim@imgtec.com>
The mfg_async power domain in mt8173 is used to power up imgtec
gpu. This domain requires the da9211 regulator to be enabled before
the power domain can be enabled successfully.
Signed-off-by: Bilal Wasim <Bilal.Wasim@imgtec.com>
---
drivers/soc/mediatek/mt8173-pm-domains.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/soc/mediatek/mt8173-pm-domains.h b/drivers/soc/mediatek/mt8173-pm-domains.h
index 3e8ee5dabb43..065b8195e7d6 100644
--- a/drivers/soc/mediatek/mt8173-pm-domains.h
+++ b/drivers/soc/mediatek/mt8173-pm-domains.h
@@ -63,6 +63,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8173[] = {
.ctl_offs = SPM_MFG_ASYNC_PWR_CON,
.sram_pdn_bits = GENMASK(11, 8),
.sram_pdn_ack_bits = 0,
+ .caps = MTK_SCPD_DOMAIN_SUPPLY,
},
[MT8173_POWER_DOMAIN_MFG_2D] = {
.sta_mask = PWR_STATUS_MFG_2D,
--
2.25.1
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next prev parent reply other threads:[~2021-02-01 5:46 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-01 5:45 [PATCH 0/2] Misc bug fixes in mtk power domain driver Bilal Wasim
2021-02-01 5:45 ` [PATCH 1/2] soc: mediatek: pm-domains: Use correct mask for bus_prot_clr Bilal Wasim
2021-02-01 5:54 ` Hsin-Yi Wang
2021-02-01 8:59 ` Matthias Brugger
2021-02-01 11:34 ` Bilal Wasim
2021-02-01 5:45 ` Bilal Wasim [this message]
2021-02-01 5:54 ` [PATCH 2/2] soc: mediatek: pm-domains: Add domain_supply cap for mfg_async PD Hsin-Yi Wang
2021-02-01 7:20 ` kernel test robot
2021-02-01 9:14 ` Matthias Brugger
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