From: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
To: Matthias Brugger <matthias.bgg@gmail.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Cc: <Project_Global_Chrome_Upstream_Group@mediatek.com>,
<devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>,
<linux-mediatek@lists.infradead.org>,
"Chen-Yu Tsai" <wenst@chromium.org>,
Ryder Lee <ryder.lee@kernel.org>, Hui Liu <hui.liu@mediatek.com>,
Allen-KH Cheng <allen-kh.cheng@mediatek.com>
Subject: [PATCH v5 2/4] arm64: dts: mt8192: Add mmc device nodes
Date: Wed, 30 Mar 2022 21:38:14 +0800 [thread overview]
Message-ID: <20220330133816.30806-3-allen-kh.cheng@mediatek.com> (raw)
In-Reply-To: <20220330133816.30806-1-allen-kh.cheng@mediatek.com>
Add mmc nodes for mt8192 SoC.
Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
arch/arm64/boot/dts/mediatek/mt8192.dtsi | 32 ++++++++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index 69e8d1934d53..c1057878e2c6 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
@@ -991,6 +991,38 @@
#clock-cells = <1>;
};
+ mmc0: mmc@11f60000 {
+ compatible = "mediatek,mt8192-mmc", "mediatek,mt8183-mmc";
+ reg = <0 0x11f60000 0 0x1000>, <0 0x11f50000 0 0x1000>;
+ interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&topckgen CLK_TOP_MSDC50_0_SEL>,
+ <&msdc_top CLK_MSDC_TOP_H_MST_0P>,
+ <&msdc_top CLK_MSDC_TOP_SRC_0P>,
+ <&msdc_top CLK_MSDC_TOP_P_CFG>,
+ <&msdc_top CLK_MSDC_TOP_P_MSDC0>,
+ <&msdc_top CLK_MSDC_TOP_AXI>,
+ <&msdc_top CLK_MSDC_TOP_AHB2AXI_BRG_AXI>;
+ clock-names = "source", "hclk", "source_cg", "sys_cg",
+ "pclk_cg", "axi_cg", "ahb_cg";
+ status = "disabled";
+ };
+
+ mmc1: mmc@11f70000 {
+ compatible = "mediatek,mt8192-mmc", "mediatek,mt8183-mmc";
+ reg = <0 0x11f70000 0 0x1000>, <0 0x11c70000 0 0x1000>;
+ interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&topckgen CLK_TOP_MSDC30_1_SEL>,
+ <&msdc_top CLK_MSDC_TOP_H_MST_1P>,
+ <&msdc_top CLK_MSDC_TOP_SRC_1P>,
+ <&msdc_top CLK_MSDC_TOP_P_CFG>,
+ <&msdc_top CLK_MSDC_TOP_P_MSDC1>,
+ <&msdc_top CLK_MSDC_TOP_AXI>,
+ <&msdc_top CLK_MSDC_TOP_AHB2AXI_BRG_AXI>;
+ clock-names = "source", "hclk", "source_cg", "sys_cg",
+ "pclk_cg", "axi_cg", "ahb_cg";
+ status = "disabled";
+ };
+
mfgcfg: clock-controller@13fbf000 {
compatible = "mediatek,mt8192-mfgcfg";
reg = <0 0x13fbf000 0 0x1000>;
--
2.18.0
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next prev parent reply other threads:[~2022-03-30 13:48 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-30 13:38 [PATCH v5 0/4] Add driver nodes for MT8192 SoC Allen-KH Cheng
2022-03-30 13:38 ` [PATCH v5 1/4] arm64: dts: mt8192: Add PCIe node Allen-KH Cheng
2022-03-31 11:56 ` Matthias Brugger
2022-03-31 12:33 ` allen-kh.cheng
2022-03-30 13:38 ` Allen-KH Cheng [this message]
2022-03-31 12:02 ` [PATCH v5 2/4] arm64: dts: mt8192: Add mmc device nodes Matthias Brugger
2022-03-31 12:48 ` allen-kh.cheng
2022-03-31 14:19 ` Matthias Brugger
2022-03-30 13:38 ` [PATCH v5 3/4] arm64: dts: mt8192: Add H264 venc device node Allen-KH Cheng
2022-03-31 12:07 ` Matthias Brugger
2022-03-30 13:38 ` [PATCH v5 4/4] arm64: dts: mt8192: Add vcodec lat and core nodes Allen-KH Cheng
2022-03-31 14:09 ` Matthias Brugger
2022-04-01 5:06 ` allen-kh.cheng
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