From: jason-jh.lin <jason-jh.lin@mediatek.com>
To: Rob Herring <robh+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Chun-Kuang Hu <chunkuang.hu@kernel.org>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>
Cc: David Airlie <airlied@linux.ie>,
singo.chang@mediatek.com,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
postmaster@vger.kernel.org, Fabien Parent <fparent@baylibre.com>,
John 'Warthog9' Hawley <warthog9@eaglescrag.net>,
linux-stm32@st-md-mailman.stormreply.com,
roy-cw.yeh@mediatek.com,
Project_Global_Chrome_Upstream_Group@mediatek.com,
CK Hu <ck.hu@mediatek.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
devicetree@vger.kernel.org, Daniel Vetter <daniel@ffwll.ch>,
nancy.lin@mediatek.com, linux-mediatek@lists.infradead.org,
hsinyi@chromium.org, linux-arm-kernel@lists.infradead.org,
"jason-jh . lin" <jason-jh.lin@mediatek.com>,
linux-kernel@vger.kernel.org, moudy.ho@mediatek.com,
Maxime Coquelin <mcoquelin.stm32@gmail.com>
Subject: [RESEND v17 2/7] dt-bindings: arm: mediatek: mmsys: add mt8195 SoC binding
Date: Thu, 7 Apr 2022 11:04:04 +0800 [thread overview]
Message-ID: <20220407030409.9664-3-jason-jh.lin@mediatek.com> (raw)
In-Reply-To: <20220407030409.9664-1-jason-jh.lin@mediatek.com>
In the SoC before, such as mt8173, it has 2 pipelines binding to one
mmsys with the same clock driver and the same power domain.
In mt8195, there are 4 pipelines binding to 4 different mmsys, such as
vdosys0, vdosys1, vppsys0 and vppsys1.
Each mmsys uses different clock drivers and different power domain.
Since each mmsys has its own clock, they could be identified
by the different name of their clock.
Signed-off-by: jason-jh.lin <jason-jh.lin@mediatek.com>
---
.../devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
index 6c2c3edcd443..f71c8dd07bf9 100644
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
@@ -31,6 +31,7 @@ properties:
- mediatek,mt8183-mmsys
- mediatek,mt8186-mmsys
- mediatek,mt8192-mmsys
+ - mediatek,mt8195-mmsys
- mediatek,mt8365-mmsys
- const: syscon
- items:
@@ -65,6 +66,9 @@ properties:
$ref: /schemas/types.yaml#/definitions/phandle-array
maxItems: 1
+ clocks:
+ maxItems: 1
+
"#clock-cells":
const: 1
--
2.18.0
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next prev parent reply other threads:[~2022-04-07 3:10 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-07 3:04 [RESEND v17 0/7] Add Mediatek Soc DRM (vdosys0) support for mt8195 jason-jh.lin
2022-04-07 3:04 ` [RESEND v17 1/7] dt-bindings: arm: mediatek: mmsys: add power and gce properties jason-jh.lin
2022-04-07 3:04 ` jason-jh.lin [this message]
2022-04-07 5:12 ` [RESEND v17 2/7] dt-bindings: arm: mediatek: mmsys: add mt8195 SoC binding CK Hu
2022-04-07 8:30 ` AngeloGioacchino Del Regno
2022-04-07 3:04 ` [RESEND v17 3/7] soc: mediatek: add mtk-mmsys support for mt8195 vdosys0 jason-jh.lin
2022-04-07 5:45 ` CK Hu
2022-04-07 6:27 ` Jason-JH Lin
2022-04-08 1:28 ` CK Hu
2022-04-08 8:49 ` AngeloGioacchino Del Regno
2022-04-12 6:33 ` CK Hu
2022-04-07 5:58 ` CK Hu
2022-04-08 1:42 ` Jason-JH Lin
2022-04-07 9:11 ` AngeloGioacchino Del Regno
2022-04-08 2:42 ` Jason-JH Lin
2022-04-08 8:34 ` AngeloGioacchino Del Regno
2022-04-07 3:04 ` [RESEND v17 4/7] soc: mediatek: add mtk-mutex " jason-jh.lin
2022-04-07 3:04 ` [RESEND v17 5/7] drm/mediatek: add DSC support for mediatek-drm jason-jh.lin
2022-04-07 3:04 ` [RESEND v17 6/7] drm/mediatek: add MERGE " jason-jh.lin
2022-04-07 3:04 ` [RESEND v17 7/7] drm/mediatek: add mediatek-drm of vdosys0 support for mt8195 jason-jh.lin
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