Re: [RESEND v17 2/7] dt-bindings: arm: mediatek: mmsys: add mt8195 SoC binding

CK Hu
2022-04-07T05:13:14Z

Hi, Jason:

On Thu, 2022-04-07 at 11:04 +0800, jason-jh.lin wrote:
> In the SoC before, such as mt8173, it has 2 pipelines binding to one
> mmsys with the same clock driver and the same power domain.
>
> In mt8195, there are 4 pipelines binding to 4 different mmsys, such
> as
> vdosys0, vdosys1, vppsys0 and vppsys1.
> Each mmsys uses different clock drivers and different power domain.
>
> Since each mmsys has its own clock, they could be identified
> by the different name of their clock.

Reviewed-by: CK Hu <ck.hu@mediatek.com>

>
> Signed-off-by: jason-jh.lin <jason-jh.lin@mediatek.com>
> ---
> .../devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml | 4
> ++++
> 1 file changed, 4 insertions(+)
>
> diff --git
> a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
> b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
> index 6c2c3edcd443..f71c8dd07bf9 100644
> ---
> a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
> +++
> b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
> @@ -31,6 +31,7 @@ properties:
> - mediatek,mt8183-mmsys
> - mediatek,mt8186-mmsys
> - mediatek,mt8192-mmsys
> + - mediatek,mt8195-mmsys
> - mediatek,mt8365-mmsys
> - const: syscon
> - items:
> @@ -65,6 +66,9 @@ properties:
> $ref: /schemas/types.yaml#/definitions/phandle-array
> maxItems: 1
>
> + clocks:
> + maxItems: 1
> +
> "#clock-cells":
> const: 1