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Miller" , DENG Qingfang , Eric Dumazet , Florian Fainelli , George McCollister , Greg Kroah-Hartman , Hauke Mehrtens , Heikki Krogerus , Jakub Kicinski , Kurt Kanzenbach , Landen Chao , Linus Walleij , linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, Matthias Brugger , netdev@vger.kernel.org, Paolo Abeni , "Rafael J. Wysocki" , Sakari Ailus , Sean Wang , UNGLinuxDriver@microchip.com, Vivien Didelot , Woojung Huh Subject: Re: [PATCH net-next 0/6] net: dsa: always use phylink Message-ID: <20220727133824.ymedhfhrggietmpj@skbuf> References: <20220727110051.2df82bf6@dellmb> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20220727110051.2df82bf6@dellmb> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220727_063831_713015_18AC7355 X-CRM114-Status: GOOD ( 14.85 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Hello Marek, On Wed, Jul 27, 2022 at 11:00:51AM +0200, Marek Behún wrote: > Dear Vladimir, > > am I understanding correctly that your main objection to this series is > that it may break other drivers? Yes, but I'm not saying this in a way that tries to make it impossible to make progress. But rather, I've identified 8 drivers which may lack complete device tree descriptions: https://patchwork.kernel.org/project/netdevbpf/patch/20220723164635.1621911-1-vladimir.oltean@nxp.com/ Simply put, I have no indication that the changes presented here are a step in the right direction for the remaining 7 drivers. Each and every single one of them needs to be studied and discussed separately; the discussion has already started for some. > Do you think it would be okay if I changed it so that only mv88e6xxx > driver would ask for phylink for CPU/DSA ports? It would be a good start, yes. What I could do is I could move my validation logic from the patch linked above into dsa_port_link_register_of(). Running that logic would let DSA know which properties are missing. Then, for drivers that don't enforce validation, we could add new dsa_switch_ops that separately ask the driver what phy-mode to use (if missing) and what speed/duplex to use (if missing). Drivers can use whatever heuristic is appropriate for their deployments to respond to this. If the phy-mode and speed/duplex are finally resolved, DSA can create a software_node and register with phylink that way. Otherwise, DSA will continue to do what it does today, i.e. skip phylink registration. How does that sound?