From: Garmin.Chang <Garmin.Chang@mediatek.com>
To: Matthias Brugger <matthias.bgg@gmail.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Richard Cochran <richardcochran@gmail.com>
Cc: <Project_Global_Chrome_Upstream_Group@mediatek.com>,
<devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>,
<linux-mediatek@lists.infradead.org>, <linux-clk@vger.kernel.org>,
<netdev@vger.kernel.org>,
Garmin.Chang <Garmin.Chang@mediatek.com>
Subject: [PATCH v5 06/19] clk: mediatek: Add MT8188 camsys clock support
Date: Thu, 19 Jan 2023 20:48:35 +0800 [thread overview]
Message-ID: <20230119124848.26364-7-Garmin.Chang@mediatek.com> (raw)
In-Reply-To: <20230119124848.26364-1-Garmin.Chang@mediatek.com>
Add MT8188 camsys clock controllers which provide clock gate
control for camera IP blocks.
Signed-off-by: Garmin.Chang <Garmin.Chang@mediatek.com>
---
drivers/clk/mediatek/Makefile | 3 +-
drivers/clk/mediatek/clk-mt8188-cam.c | 118 ++++++++++++++++++++++++++
2 files changed, 120 insertions(+), 1 deletion(-)
create mode 100644 drivers/clk/mediatek/clk-mt8188-cam.c
diff --git a/drivers/clk/mediatek/Makefile b/drivers/clk/mediatek/Makefile
index a3393782f7e1..dc247bf67e8b 100644
--- a/drivers/clk/mediatek/Makefile
+++ b/drivers/clk/mediatek/Makefile
@@ -84,7 +84,8 @@ obj-$(CONFIG_COMMON_CLK_MT8186) += clk-mt8186-mcu.o clk-mt8186-topckgen.o clk-mt
clk-mt8186-img.o clk-mt8186-vdec.o clk-mt8186-venc.o \
clk-mt8186-cam.o clk-mt8186-mdp.o clk-mt8186-ipe.o
obj-$(CONFIG_COMMON_CLK_MT8188) += clk-mt8188-apmixedsys.o clk-mt8188-topckgen.o \
- clk-mt8188-peri_ao.o clk-mt8188-infra_ao.o
+ clk-mt8188-peri_ao.o clk-mt8188-infra_ao.o \
+ clk-mt8188-cam.o
obj-$(CONFIG_COMMON_CLK_MT8192) += clk-mt8192.o
obj-$(CONFIG_COMMON_CLK_MT8192_AUDSYS) += clk-mt8192-aud.o
obj-$(CONFIG_COMMON_CLK_MT8192_CAMSYS) += clk-mt8192-cam.o
diff --git a/drivers/clk/mediatek/clk-mt8188-cam.c b/drivers/clk/mediatek/clk-mt8188-cam.c
new file mode 100644
index 000000000000..5f7cf9db12f2
--- /dev/null
+++ b/drivers/clk/mediatek/clk-mt8188-cam.c
@@ -0,0 +1,118 @@
+// SPDX-License-Identifier: GPL-2.0-only
+//
+// Copyright (c) 2022 MediaTek Inc.
+// Author: Garmin Chang <garmin.chang@mediatek.com>
+
+#include <linux/clk-provider.h>
+#include <linux/platform_device.h>
+#include <dt-bindings/clock/mediatek,mt8188-clk.h>
+
+#include "clk-gate.h"
+#include "clk-mtk.h"
+
+static const struct mtk_gate_regs cam_cg_regs = {
+ .set_ofs = 0x4,
+ .clr_ofs = 0x8,
+ .sta_ofs = 0x0,
+};
+
+#define GATE_CAM(_id, _name, _parent, _shift) \
+ GATE_MTK(_id, _name, _parent, &cam_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
+
+static const struct mtk_gate cam_main_clks[] = {
+ GATE_CAM(CLK_CAM_MAIN_LARB13, "cam_main_larb13", "top_cam", 0),
+ GATE_CAM(CLK_CAM_MAIN_LARB14, "cam_main_larb14", "top_cam", 1),
+ GATE_CAM(CLK_CAM_MAIN_CAM, "cam_main_cam", "top_cam", 2),
+ GATE_CAM(CLK_CAM_MAIN_CAM_SUBA, "cam_main_cam_suba", "top_cam", 3),
+ GATE_CAM(CLK_CAM_MAIN_CAM_SUBB, "cam_main_cam_subb", "top_cam", 4),
+ GATE_CAM(CLK_CAM_MAIN_CAMTG, "cam_main_camtg", "top_cam", 7),
+ GATE_CAM(CLK_CAM_MAIN_SENINF, "cam_main_seninf", "top_cam", 8),
+ GATE_CAM(CLK_CAM_MAIN_GCAMSVA, "cam_main_gcamsva", "top_cam", 9),
+ GATE_CAM(CLK_CAM_MAIN_GCAMSVB, "cam_main_gcamsvb", "top_cam", 10),
+ GATE_CAM(CLK_CAM_MAIN_GCAMSVC, "cam_main_gcamsvc", "top_cam", 11),
+ GATE_CAM(CLK_CAM_MAIN_GCAMSVD, "cam_main_gcamsvd", "top_cam", 12),
+ GATE_CAM(CLK_CAM_MAIN_GCAMSVE, "cam_main_gcamsve", "top_cam", 13),
+ GATE_CAM(CLK_CAM_MAIN_GCAMSVF, "cam_main_gcamsvf", "top_cam", 14),
+ GATE_CAM(CLK_CAM_MAIN_GCAMSVG, "cam_main_gcamsvg", "top_cam", 15),
+ GATE_CAM(CLK_CAM_MAIN_GCAMSVH, "cam_main_gcamsvh", "top_cam", 16),
+ GATE_CAM(CLK_CAM_MAIN_GCAMSVI, "cam_main_gcamsvi", "top_cam", 17),
+ GATE_CAM(CLK_CAM_MAIN_GCAMSVJ, "cam_main_gcamsvj", "top_cam", 18),
+ GATE_CAM(CLK_CAM_MAIN_CAMSV_TOP, "cam_main_camsv", "top_cam", 19),
+ GATE_CAM(CLK_CAM_MAIN_CAMSV_CQ_A, "cam_main_camsv_cq_a", "top_cam", 20),
+ GATE_CAM(CLK_CAM_MAIN_CAMSV_CQ_B, "cam_main_camsv_cq_b", "top_cam", 21),
+ GATE_CAM(CLK_CAM_MAIN_CAMSV_CQ_C, "cam_main_camsv_cq_c", "top_cam", 22),
+ GATE_CAM(CLK_CAM_MAIN_FAKE_ENG, "cam_main_fake_eng", "top_cam", 28),
+ GATE_CAM(CLK_CAM_MAIN_CAM2MM0_GALS, "cam_main_cam2mm0_gals", "top_cam", 29),
+ GATE_CAM(CLK_CAM_MAIN_CAM2MM1_GALS, "cam_main_cam2mm1_gals", "top_cam", 30),
+ GATE_CAM(CLK_CAM_MAIN_CAM2SYS_GALS, "cam_main_cam2sys_gals", "top_cam", 31),
+};
+
+static const struct mtk_gate cam_rawa_clks[] = {
+ GATE_CAM(CLK_CAM_RAWA_LARBX, "cam_rawa_larbx", "top_cam", 0),
+ GATE_CAM(CLK_CAM_RAWA_CAM, "cam_rawa_cam", "top_cam", 1),
+ GATE_CAM(CLK_CAM_RAWA_CAMTG, "cam_rawa_camtg", "top_cam", 2),
+};
+
+static const struct mtk_gate cam_rawb_clks[] = {
+ GATE_CAM(CLK_CAM_RAWB_LARBX, "cam_rawb_larbx", "top_cam", 0),
+ GATE_CAM(CLK_CAM_RAWB_CAM, "cam_rawb_cam", "top_cam", 1),
+ GATE_CAM(CLK_CAM_RAWB_CAMTG, "cam_rawb_camtg", "top_cam", 2),
+};
+
+static const struct mtk_gate cam_yuva_clks[] = {
+ GATE_CAM(CLK_CAM_YUVA_LARBX, "cam_yuva_larbx", "top_cam", 0),
+ GATE_CAM(CLK_CAM_YUVA_CAM, "cam_yuva_cam", "top_cam", 1),
+ GATE_CAM(CLK_CAM_YUVA_CAMTG, "cam_yuva_camtg", "top_cam", 2),
+};
+
+static const struct mtk_gate cam_yuvb_clks[] = {
+ GATE_CAM(CLK_CAM_YUVB_LARBX, "cam_yuvb_larbx", "top_cam", 0),
+ GATE_CAM(CLK_CAM_YUVB_CAM, "cam_yuvb_cam", "top_cam", 1),
+ GATE_CAM(CLK_CAM_YUVB_CAMTG, "cam_yuvb_camtg", "top_cam", 2),
+};
+
+static const struct mtk_clk_desc cam_main_desc = {
+ .clks = cam_main_clks,
+ .num_clks = ARRAY_SIZE(cam_main_clks),
+};
+
+static const struct mtk_clk_desc cam_rawa_desc = {
+ .clks = cam_rawa_clks,
+ .num_clks = ARRAY_SIZE(cam_rawa_clks),
+};
+
+static const struct mtk_clk_desc cam_rawb_desc = {
+ .clks = cam_rawb_clks,
+ .num_clks = ARRAY_SIZE(cam_rawb_clks),
+};
+
+static const struct mtk_clk_desc cam_yuva_desc = {
+ .clks = cam_yuva_clks,
+ .num_clks = ARRAY_SIZE(cam_yuva_clks),
+};
+
+static const struct mtk_clk_desc cam_yuvb_desc = {
+ .clks = cam_yuvb_clks,
+ .num_clks = ARRAY_SIZE(cam_yuvb_clks),
+};
+
+static const struct of_device_id of_match_clk_mt8188_cam[] = {
+ { .compatible = "mediatek,mt8188-camsys", .data = &cam_main_desc },
+ { .compatible = "mediatek,mt8188-camsys-rawa", .data = &cam_rawa_desc },
+ { .compatible = "mediatek,mt8188-camsys-rawb", .data = &cam_rawb_desc },
+ { .compatible = "mediatek,mt8188-camsys-yuva", .data = &cam_yuva_desc },
+ { .compatible = "mediatek,mt8188-camsys-yuvb", .data = &cam_yuvb_desc },
+ { /* sentinel */}
+};
+
+static struct platform_driver clk_mt8188_cam_drv = {
+ .probe = mtk_clk_simple_probe,
+ .remove = mtk_clk_simple_remove,
+ .driver = {
+ .name = "clk-mt8188-cam",
+ .of_match_table = of_match_clk_mt8188_cam,
+ },
+};
+
+builtin_platform_driver(clk_mt8188_cam_drv);
+MODULE_LICENSE("GPL");
--
2.18.0
next prev parent reply other threads:[~2023-01-19 12:50 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-19 12:48 [PATCH v5 00/19] MediaTek MT8188 clock support Garmin.Chang
2023-01-19 12:48 ` [PATCH v5 01/19] dt-bindings: clock: mediatek: Add new MT8188 clock Garmin.Chang
2023-01-20 8:29 ` Krzysztof Kozlowski
2023-01-19 12:48 ` [PATCH v5 02/19] clk: mediatek: Add MT8188 apmixedsys clock support Garmin.Chang
2023-02-03 7:44 ` Chen-Yu Tsai
2023-03-09 5:41 ` Garmin Chang (張家銘)
2023-01-19 12:48 ` [PATCH v5 03/19] clk: mediatek: Add MT8188 topckgen " Garmin.Chang
2023-02-03 6:43 ` Chen-Yu Tsai
2023-03-09 5:35 ` Garmin Chang (張家銘)
2023-01-19 12:48 ` [PATCH v5 04/19] clk: mediatek: Add MT8188 peripheral " Garmin.Chang
2023-02-03 6:45 ` Chen-Yu Tsai
2023-01-19 12:48 ` [PATCH v5 05/19] clk: mediatek: Add MT8188 infrastructure " Garmin.Chang
2023-02-03 6:48 ` Chen-Yu Tsai
2023-01-19 12:48 ` Garmin.Chang [this message]
2023-02-03 6:53 ` [PATCH v5 06/19] clk: mediatek: Add MT8188 camsys " Chen-Yu Tsai
2023-01-19 12:48 ` [PATCH v5 07/19] clk: mediatek: Add MT8188 ccusys " Garmin.Chang
2023-02-03 6:55 ` Chen-Yu Tsai
2023-01-19 12:48 ` [PATCH v5 08/19] clk: mediatek: Add MT8188 imgsys " Garmin.Chang
2023-02-03 6:58 ` Chen-Yu Tsai
2023-01-19 12:48 ` [PATCH v5 09/19] clk: mediatek: Add MT8188 ipesys " Garmin.Chang
2023-02-03 6:59 ` Chen-Yu Tsai
2023-01-19 12:48 ` [PATCH v5 10/19] clk: mediatek: Add MT8188 mfgcfg " Garmin.Chang
2023-02-03 7:02 ` Chen-Yu Tsai
2023-03-09 5:30 ` Garmin Chang (張家銘)
2023-01-19 12:48 ` [PATCH v5 11/19] clk: mediatek: Add MT8188 vdecsys " Garmin.Chang
2023-02-03 7:17 ` Chen-Yu Tsai
2023-03-09 5:26 ` Garmin Chang (張家銘)
2023-01-19 12:48 ` [PATCH v5 12/19] clk: mediatek: Add MT8188 vdosys0 " Garmin.Chang
2023-02-03 7:19 ` Chen-Yu Tsai
2023-02-03 10:49 ` AngeloGioacchino Del Regno
2023-03-09 5:49 ` Garmin Chang (張家銘)
2023-03-09 11:25 ` AngeloGioacchino Del Regno
2023-03-09 5:15 ` Garmin Chang (張家銘)
2023-01-19 12:48 ` [PATCH v5 13/19] clk: mediatek: Add MT8188 vdosys1 " Garmin.Chang
2023-02-03 7:22 ` Chen-Yu Tsai
2023-01-19 12:48 ` [PATCH v5 14/19] clk: mediatek: Add MT8188 vencsys " Garmin.Chang
2023-02-03 7:25 ` Chen-Yu Tsai
2023-03-09 5:28 ` Garmin Chang (張家銘)
2023-01-19 12:48 ` [PATCH v5 15/19] clk: mediatek: Add MT8188 vppsys0 " Garmin.Chang
2023-01-19 15:45 ` Matthias Brugger
2023-02-03 7:33 ` Chen-Yu Tsai
2023-03-09 3:23 ` Garmin Chang (張家銘)
2023-01-19 12:48 ` [PATCH v5 16/19] clk: mediatek: Add MT8188 vppsys1 " Garmin.Chang
2023-01-19 15:48 ` Matthias Brugger
2023-02-03 7:35 ` Chen-Yu Tsai
2023-03-09 3:21 ` Garmin Chang (張家銘)
2023-01-19 12:48 ` [PATCH v5 17/19] clk: mediatek: Add MT8188 wpesys " Garmin.Chang
2023-02-03 7:31 ` Chen-Yu Tsai
2023-01-19 12:48 ` [PATCH v5 18/19] clk: mediatek: Add MT8188 imp i2c wrapper " Garmin.Chang
2023-02-03 7:36 ` Chen-Yu Tsai
2023-01-19 12:48 ` [PATCH v5 19/19] clk: mediatek: Add MT8188 adsp " Garmin.Chang
2023-02-03 7:39 ` Chen-Yu Tsai
2023-03-09 3:17 ` Garmin Chang (張家銘)
2023-02-03 6:23 ` [PATCH v5 00/19] MediaTek MT8188 " Chen-Yu Tsai
2023-03-09 2:55 ` Garmin Chang (張家銘)
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