From: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
To: arinc9.unal@gmail.com
Cc: "Rob Herring" <robh+dt@kernel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Paul Cercueil" <paul@crapouillou.net>,
"Matthias Brugger" <matthias.bgg@gmail.com>,
"AngeloGioacchino Del Regno"
<angelogioacchino.delregno@collabora.com>,
"Sergio Paracuellos" <sergio.paracuellos@gmail.com>,
"Florian Fainelli" <f.fainelli@gmail.com>,
"Arınç ÜNAL" <arinc.unal@arinc9.com>,
"Krzysztof Kozlowski" <krzysztof.kozlowski@linaro.org>,
devicetree@vger.kernel.org, linux-mips@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org, erkin.bozoglu@xeront.com
Subject: Re: [PATCH 2/2] mips: dts: ralink: mt7621: add port@5 as CPU port
Date: Fri, 17 Feb 2023 12:03:06 +0100 [thread overview]
Message-ID: <20230217110306.GB7138@alpha.franken.de> (raw)
In-Reply-To: <20230211104915.116253-2-arinc.unal@arinc9.com>
On Sat, Feb 11, 2023 at 01:49:15PM +0300, arinc9.unal@gmail.com wrote:
> From: Arınç ÜNAL <arinc.unal@arinc9.com>
>
> On MT7621AT, MT7621DAT, and MT7621ST SoCs, port 5 of the MT7530 switch is
> connected to the second MAC of the SoC as a CPU port. Add the port and set
> up the second MAC on the bindings. Revert PHY muxing on GB-PC1.
>
> There's an external PHY connected to the second MAC of the SoC on GB-PC2,
> therefore, disable port@5 for this device.
>
> Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
> ---
> .../boot/dts/ralink/mt7621-gnubee-gb-pc1.dts | 16 +++++-----------
> .../boot/dts/ralink/mt7621-gnubee-gb-pc2.dts | 9 ++++++++-
> arch/mips/boot/dts/ralink/mt7621.dtsi | 19 ++++++++++++++++++-
> 3 files changed, 31 insertions(+), 13 deletions(-)
applied to mips-next.
Thomas.
--
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea. [ RFC1925, 2.3 ]
next prev parent reply other threads:[~2023-02-17 11:05 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-11 10:49 [PATCH 1/2] mips: dts: align LED node names with dtschema arinc9.unal
2023-02-11 10:49 ` [PATCH 2/2] mips: dts: ralink: mt7621: add port@5 as CPU port arinc9.unal
2023-02-14 12:33 ` Sergio Paracuellos
2023-02-17 11:03 ` Thomas Bogendoerfer [this message]
2023-02-14 12:36 ` [PATCH 1/2] mips: dts: align LED node names with dtschema Sergio Paracuellos
2023-02-17 11:02 ` Thomas Bogendoerfer
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