From: Tinghan Shen <tinghan.shen@mediatek.com>
To: Bjorn Andersson <andersson@kernel.org>,
Mathieu Poirier <mathieu.poirier@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>,
Tinghan Shen <tinghan.shen@mediatek.com>
Cc: <linux-remoteproc@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
<Project_Global_Chrome_Upstream_Group@mediatek.com>
Subject: [PATCH v17 09/14] remoteproc: mediatek: Remove dependency of MT8195 SCP L2TCM power control on dual-core SCP
Date: Fri, 1 Sep 2023 16:09:30 +0800 [thread overview]
Message-ID: <20230901080935.14571-10-tinghan.shen@mediatek.com> (raw)
In-Reply-To: <20230901080935.14571-1-tinghan.shen@mediatek.com>
Previously, SCP core 0 controlled the power of L2TCM and dictated that
SCP core 1 could only boot after SCP core 0. To address this constraint,
extracted the power control flow of L2TCM and made it shared
between both cores, enabling support for arbitrary boot order.
The flow for controlling L2TCM power has been incorporated into the
mt8195_scp_before_load() and mt8195_scp_stop() APIs, which are
respectively invoked during the rproc->ops->start() and
rproc->ops->stop() operations. These APIs effectively serve the same
purpose as the rproc prepare()/unprepare() APIs."
Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
---
drivers/remoteproc/mtk_common.h | 3 ++
drivers/remoteproc/mtk_scp.c | 71 ++++++++++++++++++++++++++-------
2 files changed, 59 insertions(+), 15 deletions(-)
diff --git a/drivers/remoteproc/mtk_common.h b/drivers/remoteproc/mtk_common.h
index 1438159ae736..fea05bbba9aa 100644
--- a/drivers/remoteproc/mtk_common.h
+++ b/drivers/remoteproc/mtk_common.h
@@ -106,6 +106,9 @@ struct mtk_scp_of_cluster {
size_t l1tcm_size;
phys_addr_t l1tcm_phys;
struct list_head mtk_scp_list;
+ /* Prevent concurrent operations of this structure and L2TCM power control. */
+ struct mutex cluster_lock;
+ u32 l2tcm_refcnt;
};
struct mtk_scp {
diff --git a/drivers/remoteproc/mtk_scp.c b/drivers/remoteproc/mtk_scp.c
index 685e2c2bb6ee..59d9182a8d1e 100644
--- a/drivers/remoteproc/mtk_scp.c
+++ b/drivers/remoteproc/mtk_scp.c
@@ -454,19 +454,37 @@ static int mt8192_scp_before_load(struct mtk_scp *scp)
return 0;
}
-static int mt8195_scp_before_load(struct mtk_scp *scp)
+static int mt8195_scp_l2tcm_on(struct mtk_scp *scp)
{
- /* clear SPM interrupt, SCP2SPM_IPC_CLR */
- writel(0xff, scp->cluster->reg_base + MT8192_SCP2SPM_IPC_CLR);
+ struct mtk_scp_of_cluster *scp_cluster = scp->cluster;
+
+ mutex_lock(&scp_cluster->cluster_lock);
+
+ if (scp_cluster->l2tcm_refcnt == 0) {
+ /* clear SPM interrupt, SCP2SPM_IPC_CLR */
+ writel(0xff, scp->cluster->reg_base + MT8192_SCP2SPM_IPC_CLR);
+
+ /* Power on L2TCM */
+ scp_sram_power_on(scp->cluster->reg_base + MT8192_L2TCM_SRAM_PD_0, 0);
+ scp_sram_power_on(scp->cluster->reg_base + MT8192_L2TCM_SRAM_PD_1, 0);
+ scp_sram_power_on(scp->cluster->reg_base + MT8192_L2TCM_SRAM_PD_2, 0);
+ scp_sram_power_on(scp->cluster->reg_base + MT8192_L1TCM_SRAM_PDN,
+ MT8195_L1TCM_SRAM_PDN_RESERVED_RSI_BITS);
+ }
+
+ scp_cluster->l2tcm_refcnt += 1;
+ mutex_unlock(&scp_cluster->cluster_lock);
+
+ return 0;
+}
+
+static int mt8195_scp_before_load(struct mtk_scp *scp)
+{
writel(1, scp->cluster->reg_base + MT8192_CORE0_SW_RSTN_SET);
- /* enable SRAM clock */
- scp_sram_power_on(scp->cluster->reg_base + MT8192_L2TCM_SRAM_PD_0, 0);
- scp_sram_power_on(scp->cluster->reg_base + MT8192_L2TCM_SRAM_PD_1, 0);
- scp_sram_power_on(scp->cluster->reg_base + MT8192_L2TCM_SRAM_PD_2, 0);
- scp_sram_power_on(scp->cluster->reg_base + MT8192_L1TCM_SRAM_PDN,
- MT8195_L1TCM_SRAM_PDN_RESERVED_RSI_BITS);
+ mt8195_scp_l2tcm_on(scp);
+
scp_sram_power_on(scp->cluster->reg_base + MT8192_CPU0_SRAM_PD, 0);
/* enable MPU for all memory regions */
@@ -479,6 +497,8 @@ static int mt8195_scp_c1_before_load(struct mtk_scp *scp)
{
scp->data->scp_reset_assert(scp);
+ mt8195_scp_l2tcm_on(scp);
+
scp_sram_power_on(scp->cluster->reg_base + MT8195_CPU1_SRAM_PD, 0);
/* enable MPU for all memory regions */
@@ -645,14 +665,31 @@ static void mt8192_scp_stop(struct mtk_scp *scp)
writel(0, scp->cluster->reg_base + MT8192_CORE0_WDT_CFG);
}
+static void mt8195_scp_l2tcm_off(struct mtk_scp *scp)
+{
+ struct mtk_scp_of_cluster *scp_cluster = scp->cluster;
+
+ mutex_lock(&scp_cluster->cluster_lock);
+
+ if (scp_cluster->l2tcm_refcnt > 0)
+ scp_cluster->l2tcm_refcnt -= 1;
+
+ if (scp_cluster->l2tcm_refcnt == 0) {
+ /* Power off L2TCM */
+ scp_sram_power_off(scp->cluster->reg_base + MT8192_L2TCM_SRAM_PD_0, 0);
+ scp_sram_power_off(scp->cluster->reg_base + MT8192_L2TCM_SRAM_PD_1, 0);
+ scp_sram_power_off(scp->cluster->reg_base + MT8192_L2TCM_SRAM_PD_2, 0);
+ scp_sram_power_off(scp->cluster->reg_base + MT8192_L1TCM_SRAM_PDN,
+ MT8195_L1TCM_SRAM_PDN_RESERVED_RSI_BITS);
+ }
+
+ mutex_unlock(&scp_cluster->cluster_lock);
+}
+
static void mt8195_scp_stop(struct mtk_scp *scp)
{
- /* Disable SRAM clock */
- scp_sram_power_off(scp->cluster->reg_base + MT8192_L2TCM_SRAM_PD_0, 0);
- scp_sram_power_off(scp->cluster->reg_base + MT8192_L2TCM_SRAM_PD_1, 0);
- scp_sram_power_off(scp->cluster->reg_base + MT8192_L2TCM_SRAM_PD_2, 0);
- scp_sram_power_off(scp->cluster->reg_base + MT8192_L1TCM_SRAM_PDN,
- MT8195_L1TCM_SRAM_PDN_RESERVED_RSI_BITS);
+ mt8195_scp_l2tcm_off(scp);
+
scp_sram_power_off(scp->cluster->reg_base + MT8192_CPU0_SRAM_PD, 0);
/* Disable SCP watchdog */
@@ -661,6 +698,8 @@ static void mt8195_scp_stop(struct mtk_scp *scp)
static void mt8195_scp_c1_stop(struct mtk_scp *scp)
{
+ mt8195_scp_l2tcm_off(scp);
+
/* Power off CPU SRAM */
scp_sram_power_off(scp->cluster->reg_base + MT8195_CPU1_SRAM_PD, 0);
@@ -1108,6 +1147,7 @@ static int scp_probe(struct platform_device *pdev)
}
INIT_LIST_HEAD(&scp_cluster->mtk_scp_list);
+ mutex_init(&scp_cluster->cluster_lock);
ret = devm_of_platform_populate(dev);
if (ret)
@@ -1131,6 +1171,7 @@ static void scp_remove(struct platform_device *pdev)
rproc_del(scp->rproc);
scp_free(scp);
}
+ mutex_destroy(&scp_cluster->cluster_lock);
}
static const struct mtk_scp_of_data mt8183_of_data = {
--
2.18.0
next prev parent reply other threads:[~2023-09-01 8:10 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-01 8:09 [PATCH v17 00/14] Add support for MT8195 SCP 2nd core Tinghan Shen
2023-09-01 8:09 ` [PATCH v17 01/14] dt-bindings: remoteproc: mediatek: Improve the rpmsg subnode definition Tinghan Shen
2023-09-01 8:09 ` [PATCH v17 02/14] arm64: dts: mediatek: Update the node name of SCP rpmsg subnode Tinghan Shen
2023-09-01 8:09 ` [PATCH v17 03/14] dt-bindings: remoteproc: mediatek: Support MT8195 dual-core SCP Tinghan Shen
2023-09-01 8:09 ` [PATCH v17 04/14] remoteproc: mediatek: Add MT8195 SCP core 1 operations Tinghan Shen
2023-09-01 8:09 ` [PATCH v17 05/14] remoteproc: mediatek: Extract SCP common registers Tinghan Shen
2023-09-07 10:49 ` AngeloGioacchino Del Regno
2023-09-01 8:09 ` [PATCH v17 06/14] remoteproc: mediatek: Revise SCP rproc initialization flow for multi-core SCP Tinghan Shen
2023-09-05 7:46 ` AngeloGioacchino Del Regno
2023-09-01 8:09 ` [PATCH v17 07/14] remoteproc: mediatek: Probe SCP cluster on single-core SCP Tinghan Shen
2023-09-05 7:48 ` AngeloGioacchino Del Regno
2023-09-01 8:09 ` [PATCH v17 08/14] remoteproc: mediatek: Probe SCP cluster on multi-core SCP Tinghan Shen
2023-09-01 8:09 ` Tinghan Shen [this message]
2023-09-05 7:46 ` [PATCH v17 09/14] remoteproc: mediatek: Remove dependency of MT8195 SCP L2TCM power control on dual-core SCP AngeloGioacchino Del Regno
2023-09-01 8:09 ` [PATCH v17 10/14] remoteproc: mediatek: Setup MT8195 SCP core 1 SRAM offset Tinghan Shen
2023-09-01 8:09 ` [PATCH v17 11/14] remoteproc: mediatek: Handle MT8195 SCP core 1 watchdog timeout Tinghan Shen
2023-09-01 8:09 ` [PATCH v17 12/14] remoteproc: mediatek: Report watchdog crash to all cores Tinghan Shen
2023-09-05 7:46 ` AngeloGioacchino Del Regno
2023-09-01 8:09 ` [PATCH v17 13/14] remoteproc: mediatek: Refine ipi handler error message Tinghan Shen
2023-09-01 8:09 ` [PATCH v17 14/14] arm64: dts: mediatek: mt8195: Add SCP 2nd core Tinghan Shen
2023-09-04 17:48 ` Mathieu Poirier
2023-09-04 17:50 ` [PATCH v17 00/14] Add support for MT8195 " Mathieu Poirier
2023-09-05 7:46 ` AngeloGioacchino Del Regno
2023-09-13 17:50 ` Mathieu Poirier
2023-09-18 10:31 ` Laura Nao
2023-09-18 10:44 ` Chen-Yu Tsai
2023-09-19 1:17 ` Mathieu Poirier
2023-09-19 5:07 ` Chen-Yu Tsai
2023-09-20 8:51 ` TingHan Shen (沈廷翰)
2023-09-19 1:14 ` Mathieu Poirier
2023-09-19 8:45 ` Laura Nao
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