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From: Moudy Ho <moudy.ho@mediatek.com>
To: Chun-Kuang Hu <chunkuang.hu@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Mauro Carvalho Chehab <mchehab@kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	AngeloGioacchino Del Regno
	<angelogioacchino.delregno@collabora.com>,
	Hans Verkuil <hverkuil-cisco@xs4all.nl>
Cc: <dri-devel@lists.freedesktop.org>,
	<linux-mediatek@lists.infradead.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-media@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	Moudy Ho <moudy.ho@mediatek.com>
Subject: [PATCH v7 02/16] dt-bindings: media: mediatek: mdp3: merge the indentical RDMA under display
Date: Thu, 12 Oct 2023 16:40:23 +0800	[thread overview]
Message-ID: <20231012084037.19376-3-moudy.ho@mediatek.com> (raw)
In-Reply-To: <20231012084037.19376-1-moudy.ho@mediatek.com>

To simplify maintenance and avoid branches, the identical component
should be merged and placed in the path belonging to the MDP
(from display/* to media/*).

In addition, currently only MDP utilizes RDMA through CMDQ, and the
necessary properties for "mediatek,gce-events", and "mboxes" have been
set up for this purpose.
Within DISP, it directly receives component interrupt signals.

Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
---
 .../display/mediatek/mediatek,mdp-rdma.yaml   | 88 -------------------
 .../bindings/media/mediatek,mdp3-rdma.yaml    | 55 +++++++++---
 2 files changed, 45 insertions(+), 98 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml

diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml
deleted file mode 100644
index dd12e2ff685c..000000000000
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml
+++ /dev/null
@@ -1,88 +0,0 @@
-# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
-%YAML 1.2
----
-$id: http://devicetree.org/schemas/display/mediatek/mediatek,mdp-rdma.yaml#
-$schema: http://devicetree.org/meta-schemas/core.yaml#
-
-title: MediaTek MDP RDMA
-
-maintainers:
-  - Chun-Kuang Hu <chunkuang.hu@kernel.org>
-  - Philipp Zabel <p.zabel@pengutronix.de>
-
-description:
-  The MediaTek MDP RDMA stands for Read Direct Memory Access.
-  It provides real time data to the back-end panel driver, such as DSI,
-  DPI and DP_INTF.
-  It contains one line buffer to store the sufficient pixel data.
-  RDMA device node must be siblings to the central MMSYS_CONFIG node.
-  For a description of the MMSYS_CONFIG binding, see
-  Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml for details.
-
-properties:
-  compatible:
-    const: mediatek,mt8195-vdo1-rdma
-
-  reg:
-    maxItems: 1
-
-  interrupts:
-    maxItems: 1
-
-  power-domains:
-    maxItems: 1
-
-  clocks:
-    items:
-      - description: RDMA Clock
-
-  iommus:
-    maxItems: 1
-
-  mediatek,gce-client-reg:
-    description:
-      The register of display function block to be set by gce. There are 4 arguments,
-      such as gce node, subsys id, offset and register size. The subsys id that is
-      mapping to the register of display function blocks is defined in the gce header
-      include/dt-bindings/gce/<chip>-gce.h of each chips.
-    $ref: /schemas/types.yaml#/definitions/phandle-array
-    items:
-      items:
-        - description: phandle of GCE
-        - description: GCE subsys id
-        - description: register offset
-        - description: register size
-    maxItems: 1
-
-required:
-  - compatible
-  - reg
-  - power-domains
-  - clocks
-  - iommus
-  - mediatek,gce-client-reg
-
-additionalProperties: false
-
-examples:
-  - |
-    #include <dt-bindings/interrupt-controller/arm-gic.h>
-    #include <dt-bindings/clock/mt8195-clk.h>
-    #include <dt-bindings/power/mt8195-power.h>
-    #include <dt-bindings/gce/mt8195-gce.h>
-    #include <dt-bindings/memory/mt8195-memory-port.h>
-
-    soc {
-        #address-cells = <2>;
-        #size-cells = <2>;
-
-        rdma@1c104000 {
-            compatible = "mediatek,mt8195-vdo1-rdma";
-            reg = <0 0x1c104000 0 0x1000>;
-            interrupts = <GIC_SPI 495 IRQ_TYPE_LEVEL_HIGH 0>;
-            clocks = <&vdosys1 CLK_VDO1_MDP_RDMA0>;
-            power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>;
-            iommus = <&iommu_vdo M4U_PORT_L2_MDP_RDMA0>;
-            mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x4000 0x1000>;
-        };
-    };
diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml
index 3e128733ef53..c043204cf210 100644
--- a/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml
+++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml
@@ -20,8 +20,9 @@ description: |
 
 properties:
   compatible:
-    items:
-      - const: mediatek,mt8183-mdp3-rdma
+    enum:
+      - mediatek,mt8183-mdp3-rdma
+      - mediatek,mt8195-vdo1-rdma
 
   reg:
     maxItems: 1
@@ -49,17 +50,18 @@ properties:
     maxItems: 1
 
   clocks:
-    items:
-      - description: RDMA clock
-      - description: RSZ clock
+    minItems: 1
+    maxItems: 2
 
   iommus:
     maxItems: 1
 
   mboxes:
-    items:
-      - description: used for 1st data pipe from RDMA
-      - description: used for 2nd data pipe from RDMA
+    minItems: 1
+    maxItems: 2
+
+  interrupts:
+    maxItems: 1
 
   '#dma-cells':
     const: 1
@@ -68,13 +70,46 @@ required:
   - compatible
   - reg
   - mediatek,gce-client-reg
-  - mediatek,gce-events
   - power-domains
   - clocks
   - iommus
-  - mboxes
   - '#dma-cells'
 
+allOf:
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: mediatek,mt8183-mdp3-rdma
+
+    then:
+      properties:
+        clocks:
+          items:
+            - description: RDMA clock
+            - description: RSZ clock (shared SRAM with RDMA)
+
+        mboxes:
+          items:
+            - description: used for 1st data pipe from RDMA
+            - description: used for 2nd data pipe from RDMA
+
+      required:
+        - mboxes
+        - mediatek,gce-events
+
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: mediatek,mt8195-vdo1-rdma
+
+    then:
+      properties:
+        clocks:
+          items:
+            - description: RDMA clock
+
 additionalProperties: false
 
 examples:
-- 
2.18.0



  parent reply	other threads:[~2023-10-12  9:01 UTC|newest]

Thread overview: 52+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-12  8:40 [PATCH v7 00/16] introduce more MDP3 components in MT8195 Moudy Ho
2023-10-12  8:40 ` [PATCH v7 01/16] dt-bindings: media: mediatek: mdp3: correct RDMA and WROT node with generic names Moudy Ho
2023-10-12 10:37   ` AngeloGioacchino Del Regno
2023-10-12  8:40 ` Moudy Ho [this message]
2023-10-12 10:33   ` [PATCH v7 02/16] dt-bindings: media: mediatek: mdp3: merge the indentical RDMA under display AngeloGioacchino Del Regno
2023-10-13  6:46   ` Krzysztof Kozlowski
2023-10-18  3:06     ` Moudy Ho (何宗原)
2023-10-18  9:29       ` AngeloGioacchino Del Regno
2023-10-12  8:40 ` [PATCH v7 03/16] dt-bindings: media: mediatek: mdp3: add config for MT8195 RDMA Moudy Ho
2023-10-12 10:27   ` AngeloGioacchino Del Regno
2023-10-13  6:47   ` Krzysztof Kozlowski
2023-10-12  8:40 ` [PATCH v7 04/16] dt-bindings: media: mediatek: mdp3: add compatible for MT8195 RSZ Moudy Ho
2023-10-12 10:23   ` AngeloGioacchino Del Regno
2023-10-13  6:47   ` Krzysztof Kozlowski
2023-10-12  8:40 ` [PATCH v7 05/16] dt-bindings: media: mediatek: mdp3: add compatible for MT8195 WROT Moudy Ho
2023-10-12 10:23   ` AngeloGioacchino Del Regno
2023-10-13  6:48   ` Krzysztof Kozlowski
2023-10-12  8:40 ` [PATCH v7 06/16] dt-bindings: media: mediatek: mdp3: add component FG for MT8195 Moudy Ho
2023-10-12 10:22   ` AngeloGioacchino Del Regno
2023-10-13  6:02     ` Moudy Ho (何宗原)
2023-10-13  6:49   ` Krzysztof Kozlowski
2023-10-12  8:40 ` [PATCH v7 07/16] dt-bindings: media: mediatek: mdp3: add component HDR " Moudy Ho
2023-10-12 10:21   ` AngeloGioacchino Del Regno
2023-10-13  6:49   ` Krzysztof Kozlowski
2023-10-12  8:40 ` [PATCH v7 08/16] dt-bindings: media: mediatek: mdp3: add component STITCH " Moudy Ho
2023-10-13  6:50   ` Krzysztof Kozlowski
2023-10-12  8:40 ` [PATCH v7 09/16] dt-bindings: media: mediatek: mdp3: add component TCC " Moudy Ho
2023-10-12 10:17   ` AngeloGioacchino Del Regno
2023-10-13  6:50   ` Krzysztof Kozlowski
2023-10-12  8:40 ` [PATCH v7 10/16] dt-bindings: media: mediatek: mdp3: add component TDSHP " Moudy Ho
2023-10-12 10:16   ` AngeloGioacchino Del Regno
2023-10-13  6:50   ` Krzysztof Kozlowski
2023-10-12  8:40 ` [PATCH v7 11/16] dt-bindings: display: mediatek: aal: add compatible " Moudy Ho
2023-10-12 10:10   ` AngeloGioacchino Del Regno
2023-10-12  8:40 ` [PATCH v7 12/16] dt-bindings: display: mediatek: color: " Moudy Ho
2023-10-12 10:10   ` AngeloGioacchino Del Regno
2023-10-13  6:51   ` Krzysztof Kozlowski
2023-10-12  8:40 ` [PATCH v7 13/16] dt-bindings: display: mediatek: merge: " Moudy Ho
2023-10-12 10:10   ` AngeloGioacchino Del Regno
2023-10-13  6:51   ` Krzysztof Kozlowski
2023-10-12  8:40 ` [PATCH v7 14/16] dt-bindings: display: mediatek: ovl: " Moudy Ho
2023-10-12 10:10   ` AngeloGioacchino Del Regno
2023-10-13  6:51   ` Krzysztof Kozlowski
2023-10-12  8:40 ` [PATCH v7 15/16] dt-bindings: display: mediatek: split: " Moudy Ho
2023-10-13  6:52   ` Krzysztof Kozlowski
2023-10-16  8:01     ` AngeloGioacchino Del Regno
2023-10-16 16:21       ` Krzysztof Kozlowski
2023-10-16 16:21   ` Krzysztof Kozlowski
2023-10-17 10:46     ` AngeloGioacchino Del Regno
2023-10-12  8:40 ` [PATCH v7 16/16] dt-bindings: display: mediatek: padding: " Moudy Ho
2023-10-12 12:35   ` AngeloGioacchino Del Regno
2023-10-13  6:05     ` Moudy Ho (何宗原)

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