[net-next RFC PATCH v2 09/11] dt-bindings: net: Document Qcom QCA807x PHY package

Christian Marangi
2023-11-25T00:36:31Z

Document Qcom QCA807x PHY package.

Qualcomm QCA807X Ethernet PHY is PHY package of 2 or 5
IEEE 802.3 clause 22 compliant 10BASE-Te, 100BASE-TX and
1000BASE-T PHY-s.

Document the required property to make the PHY package correctly
configure and work.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
.../devicetree/bindings/net/qcom,qca807x.yaml | 148 ++++++++++++++++++
1 file changed, 148 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/qcom,qca807x.yaml

diff --git a/Documentation/devicetree/bindings/net/qcom,qca807x.yaml b/Documentation/devicetree/bindings/net/qcom,qca807x.yaml
new file mode 100644
index 000000000000..f6f07c77a639
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/qcom,qca807x.yaml
@@ -0,0 +1,148 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/qcom,qca807x.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm QCA807X Ethernet PHY
+
+maintainers:
+ - Christian Marangi <ansuelsmth@gmail.com>
+ - Robert Marko <robert.marko@sartura.hr>
+
+description: |
+ Qualcomm QCA807X Ethernet PHY is PHY package of 2 or 5
+ IEEE 802.3 clause 22 compliant 10BASE-Te, 100BASE-TX and
+ 1000BASE-T PHY-s.
+
+ They feature 2 SerDes, one for PSGMII or QSGMII connection with
+ MAC, while second one is SGMII for connection to MAC or fiber.
+
+ Both models have a combo port that supports 1000BASE-X and
+ 100BASE-FX fiber.
+
+ Each PHY inside of QCA807x series has 4 digitally controlled
+ output only pins that natively drive LED-s for up to 2 attached
+ LEDs. Some vendor also use these 4 output for GPIO usage without
+ attaching LEDs.
+
+ Note that output pins can be set to drive LEDs OR GPIO, mixed
+ definition are not accepted.
+
+allOf:
+ - $ref: ethernet-phy-package.yaml#
+
+select:
+ properties:
+ $nodename:
+ pattern: "^ethernet-phy-package(@[a-f0-9]+)?$"
+
+ patternProperties:
+ ^ethernet-phy(@[a-f0-9]+)?$:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - ethernet-phy-id004d.d0b2
+ - ethernet-phy-id004d.d0b1
+
+ required:
+ - compatible
+
+ required:
+ - $nodename
+
+properties:
+ qcom,package-mode:
+ enum:
+ - qsgmii
+ - psgmii
+
+ qcom,tx-driver-strength:
+ enum: [140, 160, 180, 200, 220
+ 240, 260, 280, 300, 320
+ 400, 500, 600]
+
+patternProperties:
+ ^ethernet-phy(@[a-f0-9]+)?$:
+ $ref: /schemas/net/ethernet-phy.yaml#
+
+ properties:
+ gpio-controller:
+ description: set the output lines as GPIO instead of LEDs
+ type: boolean
+
+ '#gpio-cells':
+ description: number of GPIO cells for the PHY
+ const: 2
+
+ dependencies:
+ gpio-controller: ['#gpio-cells']
+
+ if:
+ required:
+ - gpio-controller
+ then:
+ properties:
+ leds: false
+
+ unevaluatedProperties: false
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/leds/common.h>
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethernet-phy-package@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ qcom,package-mode = "qsgmii";
+
+ ethernet-phy@0 {
+ compatible = "ethernet-phy-id004d.d0b2";
+ reg = <0>;
+
+ leds {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ led@0 {
+ reg = <0>;
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_LAN;
+ default-state = "keep";
+ };
+ };
+ };
+
+ ethernet-phy@1 {
+ compatible = "ethernet-phy-id004d.d0b2";
+ reg = <1>;
+ };
+
+ ethernet-phy@2 {
+ compatible = "ethernet-phy-id004d.d0b2";
+ reg = <2>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ ethernet-phy@3 {
+ compatible = "ethernet-phy-id004d.d0b2";
+ reg = <3>;
+ };
+
+ ethernet-phy@4 {
+ compatible = "ethernet-phy-id004d.d0b2";
+ reg = <4>;
+ };
+ };
+ };
--
2.40.1