From: Max Weng <max_weng@compal.corp-partner.google.com>
To: linux-kernel@vger.kernel.org
Cc: max_weng@compal.corp-partner.google.com, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org, matthias.bgg@gmail.com,
angelogioacchino.delregno@collabora.com,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org
Subject: [PATCH v3] arm64: dts: mediatek: mt8186: add FHCTL node
Date: Tue, 24 Sep 2024 18:15:59 +0800 [thread overview]
Message-ID: <20240924101559.879167-1-max_weng@compal.corp-partner.google.com> (raw)
From: max_weng <max_weng@compal.corp-partner.google.com>
add FHCTL device node for Frequency Hopping and Spread Spectrum clock function.
Signed-off-by: Max Weng <max_weng@compal.corp-partner.google.com>
---
Change from v2 to v3
* Remove the Change-Id tag.
arch/arm64/boot/dts/mediatek/mt8186.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
index 148c332018b0..d3c3c2a40adc 100644
--- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
@@ -29,6 +29,13 @@ aliases {
rdma1 = &rdma1;
};
+ fhctl: fhctl@1000ce00 {
+ compatible = "mediatek,mt8186-fhctl";
+ clocks = <&apmixedsys CLK_APMIXED_TVDPLL>;
+ reg = <0 0x1000ce00 0 0x200>;
+ status = "disabled";
+ };
+
cci: cci {
compatible = "mediatek,mt8186-cci";
clocks = <&mcusys CLK_MCU_ARMPLL_BUS_SEL>,
--
2.34.1
next reply other threads:[~2024-09-24 10:16 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-24 10:15 Max Weng [this message]
2024-09-24 11:37 ` [PATCH v3] arm64: dts: mediatek: mt8186: add FHCTL node AngeloGioacchino Del Regno
2024-10-02 9:33 ` AngeloGioacchino Del Regno
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