From: Jason-JH.Lin <jason-jh.lin@mediatek.com>
To: Jassi Brar <jassisinghbrar@gmail.com>,
Chun-Kuang Hu <chunkuang.hu@kernel.org>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Mauro Carvalho Chehab <mchehab@kernel.org>
Cc: David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
<dri-devel@lists.freedesktop.org>,
<linux-mediatek@lists.infradead.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-media@vger.kernel.org>,
"Jason-JH . Lin" <jason-jh.lin@mediatek.com>,
Singo Chang <singo.chang@mediatek.com>,
Nancy Lin <nancy.lin@mediatek.com>,
Moudy Ho <moudy.ho@mediatek.com>,
Xavier Chang <xavier.chang@mediatek.com>,
<Project_Global_Chrome_Upstream_Group@mediatek.com>
Subject: [PATCH v2 7/8] drm/mediatek: Add programming flow for unsupported subsys ID hardware
Date: Wed, 11 Dec 2024 11:22:55 +0800 [thread overview]
Message-ID: <20241211032256.28494-8-jason-jh.lin@mediatek.com> (raw)
In-Reply-To: <20241211032256.28494-1-jason-jh.lin@mediatek.com>
To support hardware without subsys IDs on new SoCs, add a programming
flow that checks whether the subsys ID is valid. If the subsys ID is
invalid, the flow will call 2 alternative CMDQ APIs:
cmdq_pkt_assign() and cmdq_pkt_write_s_value() to achieve the same
functionality.
Signed-off-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_ddp_comp.c | 34 ++++++++++++++++++++-----
1 file changed, 28 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_ddp_comp.c
index edc6417639e6..0792c895526f 100644
--- a/drivers/gpu/drm/mediatek/mtk_ddp_comp.c
+++ b/drivers/gpu/drm/mediatek/mtk_ddp_comp.c
@@ -66,14 +66,38 @@ struct mtk_ddp_comp_dev {
struct cmdq_client_reg cmdq_reg;
};
+#if IS_REACHABLE(CONFIG_MTK_CMDQ)
+static void mtk_ddp_write_cmdq_pkt(struct cmdq_pkt *cmdq_pkt, struct cmdq_client_reg *cmdq_reg,
+ unsigned int offset, unsigned int value, unsigned int mask)
+{
+ struct cmdq_client *cl = (struct cmdq_client *)cmdq_pkt->cl;
+
+ offset += cmdq_reg->offset;
+
+ if (cmdq_subsys_is_valid(cl->chan, cmdq_reg->subsys)) {
+ if (mask == GENMASK(31, 0))
+ cmdq_pkt_write(cmdq_pkt, cmdq_reg->subsys, offset, value);
+ else
+ cmdq_pkt_write_mask(cmdq_pkt, cmdq_reg->subsys, offset, value, mask);
+ } else {
+ /* only MMIO access, no need to check mminfro_offset */
+ cmdq_pkt_assign(cmdq_pkt, 0, CMDQ_ADDR_HIGH(cmdq_reg->pa_base));
+ if (mask == GENMASK(31, 0))
+ cmdq_pkt_write_s_value(cmdq_pkt, 0, CMDQ_ADDR_LOW(offset), value);
+ else
+ cmdq_pkt_write_s_mask_value(cmdq_pkt, 0, CMDQ_ADDR_LOW(offset),
+ value, mask);
+ }
+}
+#endif
+
void mtk_ddp_write(struct cmdq_pkt *cmdq_pkt, unsigned int value,
struct cmdq_client_reg *cmdq_reg, void __iomem *regs,
unsigned int offset)
{
#if IS_REACHABLE(CONFIG_MTK_CMDQ)
if (cmdq_pkt)
- cmdq_pkt_write(cmdq_pkt, cmdq_reg->subsys,
- cmdq_reg->offset + offset, value);
+ mtk_ddp_write_cmdq_pkt(cmdq_pkt, cmdq_reg, offset, value, GENMASK(31, 0));
else
#endif
writel(value, regs + offset);
@@ -85,8 +109,7 @@ void mtk_ddp_write_relaxed(struct cmdq_pkt *cmdq_pkt, unsigned int value,
{
#if IS_REACHABLE(CONFIG_MTK_CMDQ)
if (cmdq_pkt)
- cmdq_pkt_write(cmdq_pkt, cmdq_reg->subsys,
- cmdq_reg->offset + offset, value);
+ mtk_ddp_write_cmdq_pkt(cmdq_pkt, cmdq_reg, offset, value, GENMASK(31, 0));
else
#endif
writel_relaxed(value, regs + offset);
@@ -98,8 +121,7 @@ void mtk_ddp_write_mask(struct cmdq_pkt *cmdq_pkt, unsigned int value,
{
#if IS_REACHABLE(CONFIG_MTK_CMDQ)
if (cmdq_pkt) {
- cmdq_pkt_write_mask(cmdq_pkt, cmdq_reg->subsys,
- cmdq_reg->offset + offset, value, mask);
+ mtk_ddp_write_cmdq_pkt(cmdq_pkt, cmdq_reg, offset, value, mask);
} else {
#endif
u32 tmp = readl(regs + offset);
--
2.43.0
next prev parent reply other threads:[~2024-12-11 3:25 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-11 3:22 [PATCH v2 0/8] Add GCE support for MT8196 Jason-JH.Lin
2024-12-11 3:22 ` [PATCH v2 1/8] dt-bindings: mailbox: mediatek: Add GCE header file " Jason-JH.Lin
2024-12-11 9:37 ` Krzysztof Kozlowski
2024-12-12 3:05 ` Jason-JH Lin (林睿祥)
2024-12-12 7:20 ` Krzysztof Kozlowski
2024-12-12 11:24 ` Jason-JH Lin (林睿祥)
2024-12-12 12:23 ` Krzysztof Kozlowski
2024-12-12 18:06 ` Jason-JH Lin (林睿祥)
2024-12-11 3:22 ` [PATCH v2 2/8] dt-bindings: mailbox: mediatek: Add MT8196 support for gce-mailbox Jason-JH.Lin
2024-12-11 9:39 ` Krzysztof Kozlowski
2024-12-12 3:41 ` Jason-JH Lin (林睿祥)
2024-12-12 7:20 ` Krzysztof Kozlowski
2024-12-12 11:25 ` Jason-JH Lin (林睿祥)
2024-12-11 3:22 ` [PATCH v2 3/8] mailbox: mtk-cmdq: Add driver data to support for MT8196 Jason-JH.Lin
2024-12-11 3:22 ` [PATCH v2 4/8] soc: mediatek: mtk-cmdq: Add pa_base parsing for unsupported subsys ID hardware Jason-JH.Lin
2024-12-11 3:22 ` [PATCH v2 5/8] soc: mediatek: mtk-cmdq: Add mminfra_offset compatibility for DRAM address Jason-JH.Lin
2024-12-11 3:22 ` [PATCH v2 6/8] soc: mediatek: Add programming flow for unsupported subsys ID hardware Jason-JH.Lin
2024-12-11 22:17 ` kernel test robot
2024-12-11 22:39 ` kernel test robot
2024-12-11 3:22 ` Jason-JH.Lin [this message]
2024-12-11 3:46 ` [PATCH v2 7/8] drm/mediatek: " CK Hu (胡俊光)
2024-12-11 4:04 ` CK Hu (胡俊光)
2024-12-12 3:48 ` Jason-JH Lin (林睿祥)
2024-12-11 3:22 ` [PATCH v2 8/8] media: mediatek: mdp3: " Jason-JH.Lin
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