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Mon, 03 Feb 2025 09:50:57 -0800 (PST) Received: from thinkpad ([120.60.129.34]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-21de31f03edsm79348895ad.45.2025.02.03.09.50.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Feb 2025 09:50:56 -0800 (PST) Date: Mon, 3 Feb 2025 23:20:49 +0530 From: "manivannan.sadhasivam@linaro.org" To: Bjorn Helgaas Cc: Jianjun Wang =?utf-8?B?KOeOi+W7uuWGmyk=?= , "linux-mediatek@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "robh@kernel.org" , "kw@linux.com" , "linux-arm-kernel@lists.infradead.org" , "matthias.bgg@gmail.com" , "bhelgaas@google.com" , "lpieralisi@kernel.org" , "linux-pci@vger.kernel.org" , AngeloGioacchino Del Regno , Ryder Lee Subject: Re: [PATCH] PCI: mediatek: Remove the usage of virt_to_phys Message-ID: <20250203175049.idxegqqsfwf4dmvq@thinkpad> References: <20250201162416.azp4slqqeabo2xyl@thinkpad> <20250201170740.GA731664@bhelgaas> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20250201170740.GA731664@bhelgaas> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250203_095057_905731_7DC6A07D X-CRM114-Status: GOOD ( 31.31 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org On Sat, Feb 01, 2025 at 11:07:40AM -0600, Bjorn Helgaas wrote: > On Sat, Feb 01, 2025 at 09:54:16PM +0530, manivannan.sadhasivam@linaro.org wrote: > > On Mon, Jan 27, 2025 at 06:41:50PM -0600, Bjorn Helgaas wrote: > > > On Thu, Jan 23, 2025 at 08:11:19AM +0000, Jianjun Wang (王建军) wrote: > > > > On Wed, 2025-01-15 at 23:01 +0530, Manivannan Sadhasivam wrote: > > > > > On Tue, Jan 07, 2025 at 01:20:58PM +0800, Jianjun Wang wrote: > > > > > > Remove the usage of virt_to_phys, as it will cause sparse warnings > > > > > > when > > > > > > building on some platforms. > > > > > > > snprintf(name, sizeof(name), "port%d", slot); > > > > > > - port->base = devm_platform_ioremap_resource_byname(pdev, > > > > > > name); > > > > > > + regs = platform_get_resource_byname(pdev, IORESOURCE_MEM, > > > > > > name); > > > > > > + if (!regs) > > > > > > + return -EINVAL; > > > > > > + > > > > > > + port->base = devm_ioremap_resource(dev, regs); > > > > > > if (IS_ERR(port->base)) { > > > > > > dev_err(dev, "failed to map port%d base\n", slot); > > > > > > return PTR_ERR(port->base); > > > > > > } > > > > > > > > > > > > + port->msg_addr = regs->start + PCIE_MSI_VECTOR; > > > > > > I think this still assumes that a CPU physical address > > > (regs->start) is the same as the PCI bus address used for MSI, so > > > this doesn't seem like the right solution to me. > > > > > > Apparently they happen to be the same on this platform because (I > > > assume) MSIs actually do work, but it's not a good pattern for > > > drivers to copy. I think what we really need is a dma_addr_t, and > > > I think there are one or two PCI controller drivers that do that. > > > > I don't see why we would need 'dma_addr_t' here. The MSI address is > > a static physical address on this platform and that is not a DMA > > address. Other drivers can *only* copy this pattern if they also > > have the physical address allocated for MSI. > > Isn't an MSI on PCI just a DMA write to a certain address? That's from the endpoint prespective when it triggers MSI. > My > assumption is that if you put an analyzer on that link, an MSI from a > device would be structurally indistinguishable from a DMA write from > the device. The MSI uses a different address, but doesn't it use the > same size and kind of address, at least from the PCIe protocol > perspective? > Yeah, but in this case the address allocated to MSI belongs to a hardcoded region in the host memory (not allocated by the DMA APIs which will have the region attributed as DMA capable). So it doesn't belong to the DMA domain, and we cannot use 'dma_addr_t'. - Mani -- மணிவண்ணன் சதாசிவம்