From: "Nícolas F. R. A. Prado" <nfraprado@collabora.com>
To: Liam Girdwood <lgirdwood@gmail.com>,
Mark Brown <broonie@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>,
Sen Chu <sen.chu@mediatek.com>,
Sean Wang <sean.wang@mediatek.com>,
Macpaul Lin <macpaul.lin@mediatek.com>,
Lee Jones <lee@kernel.org>, Jaroslav Kysela <perex@perex.cz>,
Takashi Iwai <tiwai@suse.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>
Cc: kernel@collabora.com, linux-sound@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org, linux-pm@vger.kernel.org,
"Nícolas F. R. A. Prado" <nfraprado@collabora.com>
Subject: [PATCH v4 13/19] ASoC: mediatek: mt6359-accdet: Always use eint detect mode 4
Date: Wed, 05 Mar 2025 15:58:28 -0300 [thread overview]
Message-ID: <20250305-mt6359-accdet-dts-v4-13-e5ffa5ee9991@collabora.com> (raw)
In-Reply-To: <20250305-mt6359-accdet-dts-v4-0-e5ffa5ee9991@collabora.com>
The driver currently reads a mediatek,eint-detect-mode property from DT,
which determines certain register configurations. Since there are no
users of the property, it doesn't directly describe the hardware, and
the default value (4) is known to work across multiple boards, remove
the handling for this property and always assume mode 4 is used. The
property can be properly introduced in the binding in the future if
different boards actually need different configurations.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
---
sound/soc/codecs/mt6359-accdet.c | 208 +++++++++++++--------------------------
sound/soc/codecs/mt6359-accdet.h | 1 -
2 files changed, 70 insertions(+), 139 deletions(-)
diff --git a/sound/soc/codecs/mt6359-accdet.c b/sound/soc/codecs/mt6359-accdet.c
index 6728f1018c992fc9d4e4133dbaf091d256567683..83e65b6d5845dea00a8a77d68df4b7df1f62a87c 100644
--- a/sound/soc/codecs/mt6359-accdet.c
+++ b/sound/soc/codecs/mt6359-accdet.c
@@ -81,31 +81,22 @@ static void recover_eint_setting(struct mt6359_accdet *priv);
static unsigned int adjust_eint_analog_setting(struct mt6359_accdet *priv)
{
- if (priv->data->eint_detect_mode == 0x3 ||
- priv->data->eint_detect_mode == 0x4) {
- /* ESD switches off */
- regmap_update_bits(priv->regmap,
- RG_ACCDETSPARE_ADDR, 1 << 8, 0);
- }
- if (priv->data->eint_detect_mode == 0x4) {
- if (priv->caps & ACCDET_PMIC_EINT0) {
- /* enable RG_EINT0CONFIGACCDET */
- regmap_update_bits(priv->regmap,
- RG_EINT0CONFIGACCDET_ADDR,
- RG_EINT0CONFIGACCDET_MASK_SFT,
- BIT(RG_EINT0CONFIGACCDET_SFT));
- } else if (priv->caps & ACCDET_PMIC_EINT1) {
- /* enable RG_EINT1CONFIGACCDET */
- regmap_update_bits(priv->regmap,
- RG_EINT1CONFIGACCDET_ADDR,
- RG_EINT1CONFIGACCDET_MASK_SFT,
- BIT(RG_EINT1CONFIGACCDET_SFT));
- }
- /*select 500k, use internal resistor */
- regmap_update_bits(priv->regmap, RG_EINT0HIRENB_ADDR,
- RG_EINT0HIRENB_MASK_SFT,
- BIT(RG_EINT0HIRENB_SFT));
+ /* ESD switches off */
+ regmap_update_bits(priv->regmap, RG_ACCDETSPARE_ADDR, 1 << 8, 0);
+ if (priv->caps & ACCDET_PMIC_EINT0) {
+ /* enable RG_EINT0CONFIGACCDET */
+ regmap_update_bits(priv->regmap, RG_EINT0CONFIGACCDET_ADDR,
+ RG_EINT0CONFIGACCDET_MASK_SFT,
+ BIT(RG_EINT0CONFIGACCDET_SFT));
+ } else if (priv->caps & ACCDET_PMIC_EINT1) {
+ /* enable RG_EINT1CONFIGACCDET */
+ regmap_update_bits(priv->regmap, RG_EINT1CONFIGACCDET_ADDR,
+ RG_EINT1CONFIGACCDET_MASK_SFT,
+ BIT(RG_EINT1CONFIGACCDET_SFT));
}
+ /*select 500k, use internal resistor */
+ regmap_update_bits(priv->regmap, RG_EINT0HIRENB_ADDR,
+ RG_EINT0HIRENB_MASK_SFT, BIT(RG_EINT0HIRENB_SFT));
return 0;
}
@@ -123,18 +114,14 @@ static unsigned int adjust_eint_digital_setting(struct mt6359_accdet *priv)
ACCDET_EINT1_INVERTER_SW_EN_MASK_SFT, 0);
}
- if (priv->data->eint_detect_mode == 0x4) {
- if (priv->caps & ACCDET_PMIC_EINT0) {
- /* set DA stable signal */
- regmap_update_bits(priv->regmap,
- ACCDET_DA_STABLE_ADDR,
- ACCDET_EINT0_CEN_STABLE_MASK_SFT, 0);
- } else if (priv->caps & ACCDET_PMIC_EINT1) {
- /* set DA stable signal */
- regmap_update_bits(priv->regmap,
- ACCDET_DA_STABLE_ADDR,
- ACCDET_EINT1_CEN_STABLE_MASK_SFT, 0);
- }
+ if (priv->caps & ACCDET_PMIC_EINT0) {
+ /* set DA stable signal */
+ regmap_update_bits(priv->regmap, ACCDET_DA_STABLE_ADDR,
+ ACCDET_EINT0_CEN_STABLE_MASK_SFT, 0);
+ } else if (priv->caps & ACCDET_PMIC_EINT1) {
+ /* set DA stable signal */
+ regmap_update_bits(priv->regmap, ACCDET_DA_STABLE_ADDR,
+ ACCDET_EINT1_CEN_STABLE_MASK_SFT, 0);
}
return 0;
}
@@ -159,27 +146,19 @@ static unsigned int mt6359_accdet_jd_setting(struct mt6359_accdet *priv)
static void recover_eint_analog_setting(struct mt6359_accdet *priv)
{
- if (priv->data->eint_detect_mode == 0x3 ||
- priv->data->eint_detect_mode == 0x4) {
- /* ESD switches on */
- regmap_update_bits(priv->regmap, RG_ACCDETSPARE_ADDR,
- 1 << 8, 1 << 8);
- }
- if (priv->data->eint_detect_mode == 0x4) {
- if (priv->caps & ACCDET_PMIC_EINT0) {
- /* disable RG_EINT0CONFIGACCDET */
- regmap_update_bits(priv->regmap,
- RG_EINT0CONFIGACCDET_ADDR,
- RG_EINT0CONFIGACCDET_MASK_SFT, 0);
- } else if (priv->caps & ACCDET_PMIC_EINT1) {
- /* disable RG_EINT1CONFIGACCDET */
- regmap_update_bits(priv->regmap,
- RG_EINT1CONFIGACCDET_ADDR,
- RG_EINT1CONFIGACCDET_MASK_SFT, 0);
- }
- regmap_update_bits(priv->regmap, RG_EINT0HIRENB_ADDR,
- RG_EINT0HIRENB_MASK_SFT, 0);
+ /* ESD switches on */
+ regmap_update_bits(priv->regmap, RG_ACCDETSPARE_ADDR, 1 << 8, 1 << 8);
+ if (priv->caps & ACCDET_PMIC_EINT0) {
+ /* disable RG_EINT0CONFIGACCDET */
+ regmap_update_bits(priv->regmap, RG_EINT0CONFIGACCDET_ADDR,
+ RG_EINT0CONFIGACCDET_MASK_SFT, 0);
+ } else if (priv->caps & ACCDET_PMIC_EINT1) {
+ /* disable RG_EINT1CONFIGACCDET */
+ regmap_update_bits(priv->regmap, RG_EINT1CONFIGACCDET_ADDR,
+ RG_EINT1CONFIGACCDET_MASK_SFT, 0);
}
+ regmap_update_bits(priv->regmap, RG_EINT0HIRENB_ADDR,
+ RG_EINT0HIRENB_MASK_SFT, 0);
}
static void recover_eint_digital_setting(struct mt6359_accdet *priv)
@@ -193,37 +172,30 @@ static void recover_eint_digital_setting(struct mt6359_accdet *priv)
ACCDET_EINT1_M_SW_EN_ADDR,
ACCDET_EINT1_M_SW_EN_MASK_SFT, 0);
}
- if (priv->data->eint_detect_mode == 0x4) {
+ if (priv->caps & ACCDET_PMIC_EINT0) {
/* enable eint0cen */
- if (priv->caps & ACCDET_PMIC_EINT0) {
- /* enable eint0cen */
- regmap_update_bits(priv->regmap,
- ACCDET_DA_STABLE_ADDR,
- ACCDET_EINT0_CEN_STABLE_MASK_SFT,
- BIT(ACCDET_EINT0_CEN_STABLE_SFT));
- } else if (priv->caps & ACCDET_PMIC_EINT1) {
- /* enable eint1cen */
- regmap_update_bits(priv->regmap,
- ACCDET_DA_STABLE_ADDR,
- ACCDET_EINT1_CEN_STABLE_MASK_SFT,
- BIT(ACCDET_EINT1_CEN_STABLE_SFT));
- }
+ regmap_update_bits(priv->regmap, ACCDET_DA_STABLE_ADDR,
+ ACCDET_EINT0_CEN_STABLE_MASK_SFT,
+ BIT(ACCDET_EINT0_CEN_STABLE_SFT));
+ } else if (priv->caps & ACCDET_PMIC_EINT1) {
+ /* enable eint1cen */
+ regmap_update_bits(priv->regmap, ACCDET_DA_STABLE_ADDR,
+ ACCDET_EINT1_CEN_STABLE_MASK_SFT,
+ BIT(ACCDET_EINT1_CEN_STABLE_SFT));
}
- if (priv->data->eint_detect_mode != 0x1) {
- if (priv->caps & ACCDET_PMIC_EINT0) {
- /* enable inverter */
- regmap_update_bits(priv->regmap,
- ACCDET_EINT0_INVERTER_SW_EN_ADDR,
- ACCDET_EINT0_INVERTER_SW_EN_MASK_SFT,
- BIT(ACCDET_EINT0_INVERTER_SW_EN_SFT));
- } else if (priv->caps & ACCDET_PMIC_EINT1) {
- /* enable inverter */
- regmap_update_bits(priv->regmap,
- ACCDET_EINT1_INVERTER_SW_EN_ADDR,
- ACCDET_EINT1_INVERTER_SW_EN_MASK_SFT,
- BIT(ACCDET_EINT1_INVERTER_SW_EN_SFT));
- }
+ if (priv->caps & ACCDET_PMIC_EINT0) {
+ /* enable inverter */
+ regmap_update_bits(priv->regmap,
+ ACCDET_EINT0_INVERTER_SW_EN_ADDR,
+ ACCDET_EINT0_INVERTER_SW_EN_MASK_SFT,
+ BIT(ACCDET_EINT0_INVERTER_SW_EN_SFT));
+ } else if (priv->caps & ACCDET_PMIC_EINT1) {
+ /* enable inverter */
+ regmap_update_bits(priv->regmap,
+ ACCDET_EINT1_INVERTER_SW_EN_ADDR,
+ ACCDET_EINT1_INVERTER_SW_EN_MASK_SFT,
+ BIT(ACCDET_EINT1_INVERTER_SW_EN_SFT));
}
}
@@ -534,13 +506,6 @@ static int mt6359_accdet_parse_dt(struct mt6359_accdet *priv)
priv->data->hp_eint_high = of_property_read_bool(node, "mediatek,hp-eint-high");
- ret = of_property_read_u32(node, "mediatek,eint-detect-mode",
- &priv->data->eint_detect_mode);
- if (ret) {
- /* eint detection mode equals to EINT HW Mode */
- priv->data->eint_detect_mode = 0x4;
- }
-
ret = of_property_read_u32(node, "mediatek,eint-num", &tmp);
if (ret)
tmp = 0;
@@ -592,31 +557,16 @@ static void config_digital_init_by_mode(struct mt6359_accdet *priv)
/* enable PWM */
regmap_write(priv->regmap, ACCDET_CMP_PWM_EN_ADDR, 0x67);
/* enable inverter detection */
- if (priv->data->eint_detect_mode == 0x1) {
- /* disable inverter detection */
- if (priv->caps & ACCDET_PMIC_EINT0) {
- regmap_update_bits(priv->regmap,
- ACCDET_EINT0_INVERTER_SW_EN_ADDR,
- ACCDET_EINT0_INVERTER_SW_EN_MASK_SFT,
- 0);
- } else if (priv->caps & ACCDET_PMIC_EINT1) {
- regmap_update_bits(priv->regmap,
- ACCDET_EINT1_INVERTER_SW_EN_ADDR,
- ACCDET_EINT1_INVERTER_SW_EN_MASK_SFT,
- 0);
- }
- } else {
- if (priv->caps & ACCDET_PMIC_EINT0) {
- regmap_update_bits(priv->regmap,
- ACCDET_EINT0_INVERTER_SW_EN_ADDR,
- ACCDET_EINT0_INVERTER_SW_EN_MASK_SFT,
- BIT(ACCDET_EINT0_INVERTER_SW_EN_SFT));
- } else if (priv->caps & ACCDET_PMIC_EINT1) {
- regmap_update_bits(priv->regmap,
- ACCDET_EINT1_INVERTER_SW_EN_ADDR,
- ACCDET_EINT1_INVERTER_SW_EN_MASK_SFT,
- BIT(ACCDET_EINT1_INVERTER_SW_EN_SFT));
- }
+ if (priv->caps & ACCDET_PMIC_EINT0) {
+ regmap_update_bits(priv->regmap,
+ ACCDET_EINT0_INVERTER_SW_EN_ADDR,
+ ACCDET_EINT0_INVERTER_SW_EN_MASK_SFT,
+ BIT(ACCDET_EINT0_INVERTER_SW_EN_SFT));
+ } else if (priv->caps & ACCDET_PMIC_EINT1) {
+ regmap_update_bits(priv->regmap,
+ ACCDET_EINT1_INVERTER_SW_EN_ADDR,
+ ACCDET_EINT1_INVERTER_SW_EN_MASK_SFT,
+ BIT(ACCDET_EINT1_INVERTER_SW_EN_SFT));
}
if (priv->data->hp_eint_high) {
@@ -649,28 +599,10 @@ static void config_eint_init_by_mode(struct mt6359_accdet *priv)
regmap_update_bits(priv->regmap, RG_NCP_PDDIS_EN_ADDR,
RG_NCP_PDDIS_EN_MASK_SFT, BIT(RG_NCP_PDDIS_EN_SFT));
- if (priv->data->eint_detect_mode == 0x1 ||
- priv->data->eint_detect_mode == 0x2 ||
- priv->data->eint_detect_mode == 0x3) {
- if (priv->caps & ACCDET_PMIC_EINT0) {
- regmap_update_bits(priv->regmap,
- RG_EINT0CONFIGACCDET_ADDR,
- RG_EINT0CONFIGACCDET_MASK_SFT,
- BIT(RG_EINT0CONFIGACCDET_SFT));
- } else if (priv->caps & ACCDET_PMIC_EINT1) {
- regmap_update_bits(priv->regmap,
- RG_EINT1CONFIGACCDET_ADDR,
- RG_EINT1CONFIGACCDET_MASK_SFT,
- BIT(RG_EINT1CONFIGACCDET_SFT));
- }
- }
-
- if (priv->data->eint_detect_mode != 0x1) {
- /* current detect set 0.25uA */
- regmap_update_bits(priv->regmap, RG_ACCDETSPARE_ADDR,
- 0x3 << RG_ACCDETSPARE_SFT,
- 0x3 << RG_ACCDETSPARE_SFT);
- }
+ /* current detect set 0.25uA */
+ regmap_update_bits(priv->regmap, RG_ACCDETSPARE_ADDR,
+ 0x3 << RG_ACCDETSPARE_SFT,
+ 0x3 << RG_ACCDETSPARE_SFT);
regmap_write(priv->regmap, RG_EINTCOMPVTH_ADDR,
val | priv->data->eint_comp_vth << RG_EINTCOMPVTH_SFT);
}
diff --git a/sound/soc/codecs/mt6359-accdet.h b/sound/soc/codecs/mt6359-accdet.h
index 287201eebe0330fa170093fd6192bf5694c30469..ff5cd6ea1b06f045b6e1b9f6bc53ef80d78e3b92 100644
--- a/sound/soc/codecs/mt6359-accdet.h
+++ b/sound/soc/codecs/mt6359-accdet.h
@@ -54,7 +54,6 @@ struct dts_data {
unsigned int mic_vol;
unsigned int mic_mode;
bool hp_eint_high;
- unsigned int eint_detect_mode;
unsigned int eint_comp_vth;
};
--
2.48.1
next prev parent reply other threads:[~2025-03-05 20:33 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-05 18:58 [PATCH v4 00/19] Get mt6359-accdet ready for usage in Devicetree Nícolas F. R. A. Prado
2025-03-05 18:58 ` [PATCH v4 01/19] dt-bindings: mfd: mediatek: mt6397: Add accdet subnode Nícolas F. R. A. Prado
2025-03-06 7:57 ` Krzysztof Kozlowski
2025-03-06 12:19 ` Nícolas F. R. A. Prado
2025-03-07 7:11 ` Krzysztof Kozlowski
2025-03-07 13:22 ` Nícolas F. R. A. Prado
2025-03-09 19:50 ` Krzysztof Kozlowski
2025-03-05 18:58 ` [PATCH v4 02/19] mfd: mt6397-core: Add mfd_cell for mt6359-accdet Nícolas F. R. A. Prado
2025-03-13 17:02 ` (subset) " Lee Jones
2025-03-05 18:58 ` [PATCH v4 03/19] ASoC: mediatek: mt6359-accdet: Add compatible property Nícolas F. R. A. Prado
2025-03-05 18:58 ` [PATCH v4 04/19] ASoC: mediatek: mt6359-accdet: Handle hp-eint-high property Nícolas F. R. A. Prado
2025-03-05 18:58 ` [PATCH v4 05/19] ASoC: mediatek: mt6359-accdet: Implement HP_EINT polarity configuration Nícolas F. R. A. Prado
2025-03-05 18:58 ` [PATCH v4 06/19] ASoC: mediatek: mt6359-accdet: Drop dead code for EINT/GPIO IRQ handling Nícolas F. R. A. Prado
2025-03-05 18:58 ` [PATCH v4 07/19] ASoC: mediatek: mt6359-accdet: Drop dead code for EINT trigger setting Nícolas F. R. A. Prado
2025-03-05 18:58 ` [PATCH v4 08/19] ASoC: mediatek: mt6359-accdet: Drop dead code for button detection Nícolas F. R. A. Prado
2025-03-05 18:58 ` [PATCH v4 09/19] ASoC: mediatek: mt6359-accdet: Drop dead code for plugout-debounce Nícolas F. R. A. Prado
2025-03-05 18:58 ` [PATCH v4 10/19] ASoC: mediatek: mt6359-accdet: Drop unused moisture variables Nícolas F. R. A. Prado
2025-03-05 18:58 ` [PATCH v4 11/19] ASoC: mediatek: mt6359-accdet: Always use internal resistor Nícolas F. R. A. Prado
2025-03-05 18:58 ` [PATCH v4 12/19] ASoC: mediatek: mt6359-accdet: Make PWM debounce settings internal Nícolas F. R. A. Prado
2025-03-05 18:58 ` Nícolas F. R. A. Prado [this message]
2025-03-05 18:58 ` [PATCH v4 14/19] ASoC: mediatek: mt6359-accdet: Always set micbias1 to 2.8V Nícolas F. R. A. Prado
2025-03-05 18:58 ` [PATCH v4 15/19] ASoC: mediatek: mt6359-accdet: Always configure hardware as mic-mode 2 Nícolas F. R. A. Prado
2025-03-05 18:58 ` [PATCH v4 16/19] ASoC: mediatek: mt6359-accdet: Always set comp-vth to 1.6V Nícolas F. R. A. Prado
2025-03-05 18:58 ` [PATCH v4 17/19] ASoC: mediatek: mt6359-accdet: Always use EINT0 IRQ Nícolas F. R. A. Prado
2025-03-05 18:58 ` [PATCH v4 18/19] arm64: dts: mt6359: Add accessory detect node Nícolas F. R. A. Prado
2025-03-05 18:58 ` [PATCH v4 19/19] arm64: defconfig: Enable MT6359 ACCDET Nícolas F. R. A. Prado
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20250305-mt6359-accdet-dts-v4-13-e5ffa5ee9991@collabora.com \
--to=nfraprado@collabora.com \
--cc=angelogioacchino.delregno@collabora.com \
--cc=broonie@kernel.org \
--cc=catalin.marinas@arm.com \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=kernel@collabora.com \
--cc=krzk+dt@kernel.org \
--cc=lee@kernel.org \
--cc=lgirdwood@gmail.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mediatek@lists.infradead.org \
--cc=linux-pm@vger.kernel.org \
--cc=linux-sound@vger.kernel.org \
--cc=macpaul.lin@mediatek.com \
--cc=matthias.bgg@gmail.com \
--cc=perex@perex.cz \
--cc=robh@kernel.org \
--cc=sean.wang@mediatek.com \
--cc=sen.chu@mediatek.com \
--cc=tiwai@suse.com \
--cc=will@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox