From: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
To: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org
Cc: boris.brezillon@collabora.com, robh@kernel.org,
steven.price@arm.com, maarten.lankhorst@linux.intel.com,
mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com,
simona@ffwll.ch, kernel@collabora.com,
linux-mediatek@lists.infradead.org,
linux-arm-kernel@lists.infradead.org, sjoerd@collabora.com,
angelogioacchino.delregno@collabora.com,
"Ariel D'Alessandro" <ariel.dalessandro@collabora.com>,
"Adrián Larumbe" <adrian.larumbe@collabora.com>
Subject: [PATCH v5 3/6] drm/panfrost: Set HW_FEATURE_AARCH64_MMU feature flag on Bifrost models
Date: Mon, 24 Mar 2025 15:57:58 -0300 [thread overview]
Message-ID: <20250324185801.168664-4-ariel.dalessandro@collabora.com> (raw)
In-Reply-To: <20250324185801.168664-1-ariel.dalessandro@collabora.com>
Set this feature flag on all Mali Bifrost platforms as the MMU supports
AARCH64 4K page table format.
Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Steven Price <steven.price@arm.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Adrián Larumbe <adrian.larumbe@collabora.com>
---
drivers/gpu/drm/panfrost/panfrost_features.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/panfrost/panfrost_features.h b/drivers/gpu/drm/panfrost/panfrost_features.h
index 7ed0cd3ea2d4..52f9d69f6db9 100644
--- a/drivers/gpu/drm/panfrost/panfrost_features.h
+++ b/drivers/gpu/drm/panfrost/panfrost_features.h
@@ -54,6 +54,7 @@ enum panfrost_hw_feature {
BIT_ULL(HW_FEATURE_THREAD_GROUP_SPLIT) | \
BIT_ULL(HW_FEATURE_FLUSH_REDUCTION) | \
BIT_ULL(HW_FEATURE_PROTECTED_MODE) | \
+ BIT_ULL(HW_FEATURE_AARCH64_MMU) | \
BIT_ULL(HW_FEATURE_COHERENCY_REG))
#define hw_features_g72 (\
@@ -64,6 +65,7 @@ enum panfrost_hw_feature {
BIT_ULL(HW_FEATURE_FLUSH_REDUCTION) | \
BIT_ULL(HW_FEATURE_PROTECTED_MODE) | \
BIT_ULL(HW_FEATURE_PROTECTED_DEBUG_MODE) | \
+ BIT_ULL(HW_FEATURE_AARCH64_MMU) | \
BIT_ULL(HW_FEATURE_COHERENCY_REG))
#define hw_features_g51 hw_features_g72
@@ -77,6 +79,7 @@ enum panfrost_hw_feature {
BIT_ULL(HW_FEATURE_PROTECTED_MODE) | \
BIT_ULL(HW_FEATURE_PROTECTED_DEBUG_MODE) | \
BIT_ULL(HW_FEATURE_IDVS_GROUP_SIZE) | \
+ BIT_ULL(HW_FEATURE_AARCH64_MMU) | \
BIT_ULL(HW_FEATURE_COHERENCY_REG))
#define hw_features_g76 (\
--
2.49.0
next prev parent reply other threads:[~2025-03-24 19:18 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-24 18:57 [PATCH v5 0/6] drm/panfrost: Add support for AARCH64_4K page table format Ariel D'Alessandro
2025-03-24 18:57 ` [PATCH v5 1/6] drm/panfrost: Set IOMMU_CACHE flag Ariel D'Alessandro
2025-03-24 18:57 ` [PATCH v5 2/6] drm/panfrost: Use GPU_MMU_FEATURES_VA_BITS/PA_BITS macros Ariel D'Alessandro
2025-03-24 18:57 ` Ariel D'Alessandro [this message]
2025-03-24 18:57 ` [PATCH v5 4/6] drm/panfrost: Add support for AARCH64_4K page table format Ariel D'Alessandro
2025-03-31 11:15 ` Steven Price
2025-03-31 13:25 ` Ariel D'Alessandro
2025-03-24 18:58 ` [PATCH v5 5/6] drm/panfrost: Force AARCH64_4K page table format on MediaTek MT8188 Ariel D'Alessandro
2025-03-24 18:58 ` [PATCH v5 6/6] drm/panfrost: Force AARCH64_4K page table format on MediaTek MT8192 Ariel D'Alessandro
2025-03-31 11:15 ` [PATCH v5 0/6] drm/panfrost: Add support for AARCH64_4K page table format Steven Price
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