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(fttx-pool-217.61.156.53.bambit.de [217.61.156.53]) by mxbox4.masterlogin.de (Postfix) with ESMTPSA id D86A980318; Tue, 22 Apr 2025 13:24:52 +0000 (UTC) From: Frank Wunderlich To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lee Jones , Chunfeng Yun , Vinod Koul , Kishon Vijay Abraham I , Matthias Brugger , AngeloGioacchino Del Regno Subject: [PATCH v4 4/8] dt-bindings: phy: mtk-xs-phy: support type switch by pericfg Date: Tue, 22 Apr 2025 15:24:27 +0200 Message-ID: <20250422132438.15735-5-linux@fw-web.de> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250422132438.15735-1-linux@fw-web.de> References: <20250422132438.15735-1-linux@fw-web.de> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Mail-ID: e0e4b4d5-9fca-452c-b776-a545c7a43a4d X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250422_142456_171366_0D0E2582 X-CRM114-Status: UNSURE ( 7.52 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Sean Wang , Daniel Golle , linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-mediatek@lists.infradead.org, =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= , linux-arm-kernel@lists.infradead.org Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org From: Frank Wunderlich Add support for type switch by pericfg register between USB3/PCIe. Signed-off-by: Frank Wunderlich --- v4: - changes based on comments from Krzysztof - change to phy type configuration controller/register --- .../devicetree/bindings/phy/mediatek,xsphy.yaml | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml b/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml index 3b5253659e6f..0bed847bb4ad 100644 --- a/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml +++ b/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml @@ -151,6 +151,21 @@ patternProperties: minimum: 1 maximum: 31 + mediatek,syscon-type: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + A phandle to syscon used to access the register of type switch, + the field should always be 3 cells long. + items: + - items: + - description: + Phandle to phy type configuration system controller + - description: + Phy type configuration register offset + - description: + Index of config segment + enum: [0, 1, 2, 3] + required: - reg - clocks -- 2.43.0