From: Liankun Yang <liankun.yang@mediatek.com>
To: <chunkuang.hu@kernel.org>, <p.zabel@pengutronix.de>,
<airlied@gmail.com>, <simona@ffwll.ch>, <matthias.bgg@gmail.com>,
<angelogioacchino.delregno@collabora.com>,
<mac.shen@mediatek.com>, <peng.liu@mediatek.com>,
<liankun.yang@mediatek.com>,
<Project_Global_Chrome_Upstream_Group@mediatek.com>
Cc: <dri-devel@lists.freedesktop.org>,
<linux-mediatek@lists.infradead.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>
Subject: [PATCH v4 1/1] drm/mediatek: Adjust bandwidth limit for DP
Date: Wed, 25 Jun 2025 17:54:17 +0800 [thread overview]
Message-ID: <20250625095446.31726-1-liankun.yang@mediatek.com> (raw)
By adjusting the order of link training and relocating it to HPD,
link training can identify the usability of each lane in the current link.
It also supports handling signal instability and weakness due to
environmental issues, enabling the acquisition of a stable bandwidth
for the current link. Subsequently, DP work can proceed based on
the actual maximum bandwidth.
It should training in the hpd event thread.
Check the mode with lane count and link rate of training.
If we're eDP and capabilities were already parsed we can skip
reading again because eDP panels aren't hotpluggable hence the
caps and training information won't ever change in a boot life
Therefore, bridge typec judgment is required for edp training in
atomic_enable function.
Signed-off-by: Liankun Yang <liankun.yang@mediatek.com>
---
Change in V4:
- Tested the internal eDP display on MT8195 Tomato and it is fine.
Per suggestion from the previous thread:
https://patchwork.kernel.org/project/linux-mediatek/patch/20250318140236.13650-2-liankun.yang@mediatek.com/
Change in V3:
- Remove 'mtk_dp->enabled = false" in atomic disable.
- Remove 'mtk_dp->enabled = true" in atomic enable.
Per suggestion from the previous thread:
https://patchwork.kernel.org/project/linux-mediatek/patch/20241025083036.8829-4-liankun.yang@mediatek.com/
Change in V2:
- Adjust DP training timing.
- Adjust parse capabilities timing.
- Add power on/off for connect/disconnect.
Per suggestion from the previous thread:
https://patchwork.kernel.org/project/linux-mediatek/patch/20240315015233.2023-1-liankun.yang@mediatek.com/
---
drivers/gpu/drm/mediatek/mtk_dp.c | 42 +++++++++++++++++++------------
1 file changed, 26 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_dp.c b/drivers/gpu/drm/mediatek/mtk_dp.c
index a5b10b2545dc..36e07954965b 100644
--- a/drivers/gpu/drm/mediatek/mtk_dp.c
+++ b/drivers/gpu/drm/mediatek/mtk_dp.c
@@ -1976,6 +1976,7 @@ static irqreturn_t mtk_dp_hpd_event_thread(int hpd, void *dev)
struct mtk_dp *mtk_dp = dev;
unsigned long flags;
u32 status;
+ int ret;
if (mtk_dp->need_debounce && mtk_dp->train_info.cable_plugged_in)
msleep(100);
@@ -1994,9 +1995,27 @@ static irqreturn_t mtk_dp_hpd_event_thread(int hpd, void *dev)
memset(&mtk_dp->info.audio_cur_cfg, 0,
sizeof(mtk_dp->info.audio_cur_cfg));
+ /* power off aux */
+ mtk_dp_update_bits(mtk_dp, MTK_DP_TOP_PWR_STATE,
+ DP_PWR_STATE_BANDGAP_TPLL,
+ DP_PWR_STATE_MASK);
+
mtk_dp->need_debounce = false;
mod_timer(&mtk_dp->debounce_timer,
jiffies + msecs_to_jiffies(100) - 1);
+ } else {
+ mtk_dp_aux_panel_poweron(mtk_dp, true);
+
+ ret = mtk_dp_parse_capabilities(mtk_dp);
+ if (ret)
+ drm_err(mtk_dp->drm_dev, "Can't parse capabilities\n");
+
+ /* Training */
+ ret = mtk_dp_training(mtk_dp);
+ if (ret)
+ drm_err(mtk_dp->drm_dev, "Training failed, %d\n", ret);
+
+ mtk_dp_aux_panel_poweron(mtk_dp, false);
}
}
@@ -2161,17 +2180,6 @@ static const struct drm_edid *mtk_dp_edid_read(struct drm_bridge *bridge,
}
drm_edid = drm_edid_read_ddc(connector, &mtk_dp->aux.ddc);
-
- /*
- * Parse capability here to let atomic_get_input_bus_fmts and
- * mode_valid use the capability to calculate sink bitrates.
- */
- if (mtk_dp_parse_capabilities(mtk_dp)) {
- drm_err(mtk_dp->drm_dev, "Can't parse capabilities\n");
- drm_edid_free(drm_edid);
- drm_edid = NULL;
- }
-
if (drm_edid) {
/*
* FIXME: get rid of drm_edid_raw()
@@ -2366,11 +2374,13 @@ static void mtk_dp_bridge_atomic_enable(struct drm_bridge *bridge,
mtk_dp_aux_panel_poweron(mtk_dp, true);
- /* Training */
- ret = mtk_dp_training(mtk_dp);
- if (ret) {
- drm_err(mtk_dp->drm_dev, "Training failed, %d\n", ret);
- goto power_off_aux;
+ if (mtk_dp->data->bridge_type == DRM_MODE_CONNECTOR_eDP) {
+ /* Training */
+ ret = mtk_dp_training(mtk_dp);
+ if (ret) {
+ drm_err(mtk_dp->drm_dev, "Training failed, %d\n", ret);
+ goto power_off_aux;
+ }
}
ret = mtk_dp_video_config(mtk_dp);
--
2.45.2
next reply other threads:[~2025-06-25 11:06 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-25 9:54 Liankun Yang [this message]
2025-06-25 18:49 ` [PATCH v4 1/1] drm/mediatek: Adjust bandwidth limit for DP Nícolas F. R. A. Prado
2025-06-27 1:32 ` CK Hu (胡俊光)
2025-06-27 12:33 ` Nícolas F. R. A. Prado
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